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EP0066061A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Relational algebra engine

Assignee: Toshiba Corp
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Filing: 1982-04-06
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Granted: —
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Expires: 2002-04-06
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Abstract

Abstract Disclosed is a relational algebra engine which has a sort engine (SE), a merge engine (ME), a control processor (CP) and a common bus (BUS). The sort engine has a plurality of first processing elements (PE1, PE2,..., PEn) which are connected in series. Each first processing element includes first and second buffer memories (M11, M21..., Mn1; M13, M23,..., Mn3), a first memory which has a FIFO function (B12, B22,..., Bn2), and a first processor (P1, P2,..., Pn) which sorts input data elements in accordance with a predetermined rule by using the first and second buffer memories and the first memory which has the FIFO function. The first and second buffer memories and the first memory which has the FIFO function are disposed in parallel. The merge engine has two second processing elements (RP1, RP2) which are disposed in parallel. Each second processing element includes a third buffer memory (M01, M02), a second memory which has the FIFO function (B01, B02), a second processor (P01, P02) : which merges the data elements sorted in the sort engine by using the third buffer memory and the second memory which has the FIFO function and an output buffer memory (OB1, OB2) which stores the data elements merged in the second processor. The third buffer memory is disposed parallel to the second memory which has the FIFO function.

Inventors

  • 👤 Kazuhide Iwata
  • 👤 Shigeki Shibayama
  • 👤 Yutaka Hidai
  • 👤 Shigeru Oyanagi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 19:40
CPC Classifications
G; G06; G06F; G06F16/00; G06F16/20; G06F16/24; G06F16/245; G06F16/2453; G06F16/24532; Y; Y10; Y10S; Y10S707/00; Y10S707/99931; Y10S707/99937

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 245 words
A relational algebra engine comprising a control processor (CP); a common bus means (BUS); a sort engine (SE) having a plurality of first processing elements (PE1, PE2,..., PEn) which are connected in series, each of said first processing elements including first and second buffer memories (Mll, M21,..., Mnl; M13, M23,..., Mn3), a first memory which has a FIFO function (B12, B22,..., Bn2) and a first processor (Pl, P2,..., Pn) which sorts input data elements in accordance with a predetermined rule by using said first and second buffer memories and said first memory, said first and second buffer memories and said first memory which has the FIFO function being disposed in parallel; characterized in that a merge engine (ME) having two second processing elements (RPl, RP2) which are disposed in parallel is provided; each of said second processing elements includes a third buffer memory (M01, M02), a second memory which has the FIFO function (BO1, B02), a second processor (PO1, P02) which merges data elements processed in said sort engine by using said third buffer memory and said second memory which has the FIFO function, and an output buffer memory (OBI, OB2) which stores the data elements merged in said second processor; said third buffer memory and said second memory which has the FIFO function are disposed in parallel; said control processor controls said sort engine and said merge engine; and said common bus means connects said sort engine, said merge engine and said control processor.
Claim 2
Dependent Claim 245 words
A relational algebra engine comprising a control processor (CP); a common bus means (BUS); a sort engine (SE) having a plurality of first processing elements (PE1, PE2,..., PEn) which are connected in series, each of said first processing elements including first and second buffer memories (Mll, M21,..., Mnl; M13, M23,..., Mn3), a first memory which has a FIFO function (B12, B22,..., Bn2) and a first processor (Pl, P2,..., Pn) which sorts input data elements in accordance with a predetermined rule by using said first and second buffer memories and said first memory, said first and second buffer memories and said first memory which has the FIFO function being disposed in parallel; characterized in that a merge engine (ME) having two second processing elements (RPl, RP2) which are disposed in parallel is provided; each of said second processing elements includes a third buffer memory (M01, M02), a second memory which has the FIFO function (BO1, B02), a second processor (PO1, P02) which merges data elements processed in said sort engine by using said third buffer memory and said second memory which has the FIFO function, and an output buffer memory (OBI, OB2) which stores the data elements merged in said second processor; said third buffer memory and said second memory which has the FIFO function are disposed in parallel; said control processor controls said sort engine and said merge engine; and said common bus means connects said sort engine, said merge engine and said control processor.
Claim 3
Dependent Claim 106 words
A relational algebra engine according to claim 1, characterized in that a first set which has the smallest number of data elements input and processed in said sort engine is stored in said third buffer memory, and subsets of a second set which are input in said sort engine after said first set and sorted therein are stored in said second memory which has the FIFO function, said subsets having the same number of data elements as the number of data elements of said first set, whereby said second processor merges outputs from said third buffer memory and said second memory which has the FIFO function.
Claim 4
Dependent Claim 54 words
A relational algebra engine according to claim 1 or 2, characterized in that a flag memory (FM1, FM2,..., FMn) is included in said first processing elements, said flag memory storing sort processing steps of a given attribute of the relational data base and processing the other attributes in accordance with said sort processing steps.

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