Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
161 words
A semiconductor memory device comprising a semiconductor substrate (20); a plurality of memory cells (Figure 3) integrated on the semiconductor substrate (20), each of the memory cells having a capacitor (28) for storing data, the capacitors (28) having a storage electrode (30) and an opposite electrode (31) the opposite electrode (31) being connected to a first ground-potential supply line (26 b, e); and one or more peripheral circuits (23) integrated on the semiconductor substrate and arranged around the periphery of the memory cells, the peripheral circuits (23) being connected to second ground-potential supply lines (26, a, c, d, f, g); characterised in that the first ground-potential supply line (26 b, e) is physically separate and independent of the second ground-potential supply lines (26 a, c, d, f, g) over its entire length from a common connection portion (25, 32) having an impedance lower than the impedance of any of the first and second ground-potential supply lines to the memory cells. _
Claim 2
Dependent Claim
161 words
A semiconductor memory device comprising a semiconductor substrate (20); a plurality of memory cells (Figure 3) integrated on the semiconductor substrate (20), each of the memory cells having a capacitor (28) for storing data, the capacitors (28) having a storage electrode (30) and an opposite electrode (31) the opposite electrode (31) being connected to a first ground-potential supply line (26 b, e); and one or more peripheral circuits (23) integrated on the semiconductor substrate and arranged around the periphery of the memory cells, the peripheral circuits (23) being connected to second ground-potential supply lines (26, a, c, d, f, g); characterised in that the first ground-potential supply line (26 b, e) is physically separate and independent of the second ground-potential supply lines (26 a, c, d, f, g) over its entire length from a common connection portion (25, 32) having an impedance lower than the impedance of any of the first and second ground-potential supply lines to the memory cells. _
Claim 3
Dependent Claim
33 words
A semiconductor memory device according to claim 1, wherein the common connection portion comprises a ground pad (25) provided on the semiconductor substrate (20), the ground pad in use receiving a ground voltage.
Claim 4
Dependent Claim
77 words
A semiconductor memory device according to claim 2, wherein the common connection portion (Fig 4) comprises a common-wiring line (32) connected to the ground pad (25), the first ground-potential supply lines (26 a, c, d, f, g) branching from the common-wiring line (32), the common-wiring line having a line width larger than the line width of the first ground-potential supply line (26 e) or each of the second ground-potential supply lines (26 a, c, d, f, g).
Claim 5
Dependent Claim
23 words
A semiconductor memory device according to any one of the preceding claims, wherein the capacitor (28) is formed by a depletion-type MOS transistor.