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EP0130129A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Two half-planes-organised read-only memory for read-out acceleration

Assignee: STMicroelectronics SA
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Filing: 1984-06-26
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Granted: —
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Expires: 2004-06-26
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Abstract

Abstract 1. An integrated read-only memory of the type in which the columns of memory points present a non-negligeable equivalent capacity (Ca), which is used to define a voltage variation on a selected column when a charge current (Iref) is applied to this column, this voltage variation depending on the state of the selected memory point from this columns, and the column being connected to one input of a differential amplifier, the other input of which receives a comparaison voltage, characterized in that - the memory is organized in two half-planes, the selection of a column of memory points defining in fact as well a column (D1) of memory points in one of the half-planes as a column (D'1) of memory points in the other half-plane, while the selection of a line defines a line either in one or in the other half-plane, but not simultaneously in both planes ; - the defined columns are applied for reading purposes each to one intput of a differential amplifier, the voltage on the defined column of the half-plane in which no line at all is selected constituting the comparaison voltage to which is compared the voltage in the defined column of the half-plane in which a line selected, a charge current being applied to this latter column.

Inventors

  • 👤 Sylvain Kritter
  • 👤 Daniel Vellou

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 13:35
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/18; G11C16/00; G11C16/02; G11C16/06; G11C16/26; G11C16/28; G11C17/08; G11C17/10; G11C17/12

Claims Analysis

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References Cited (Backward Citations)

FR2410337A1 Cited

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