EP0138548A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Analog-to-digital encoder and digital-to-analog decoder
Assignee: Dolby Laboratories Licensing Corp
•
Filing: 1984-10-08
•
Granted: —
•
Expires: 2004-10-08
Abstract
Abstract In the encoder an audio input signal is firstly given an adaptive pre-emphasis characteristic by a pre-processing circuit (16) and is then converted to a digital signal for transmission by a delta-modulator (22). In order to minimise the digital bit rate the delta-modulator (22) is rendered adaptive by deriving a step-size control signal in a circuit (18) responsive to the slope of the input signal, and applying the control signal to vary the step-size of the delta-modulator (22). The bandwidth of the control signal is limited to say 50 Hz by the step-size circuit (18) itself or a subsequent low pass filter (24) in order to render the encoder insensitive to random step-size errors. The slow response of the control signal is compensated for by a delay circuit (20) preceding the delta-modulator (22). The corresponding decoder comprises an adaptive delta-modulator and a circuit complementary to the pre-processing circuit (16). In order to keep the decoder as simple as possible it has no step-size derivation circuit. Instead, the step-size control signal is transmitted in conjunction with the main digital signal by way of an analog to digital converter (26). In the encoder a complementary digital to analog converter is followed by another bandwidth limiting filter to reduce the effect of transmission bit errors. The slow response of the decoder control signal is compensated for by transmitting the step-size information from the , encoder with a time advance relative to the main digital signal.
Inventors
- 👤 Craig C. Todd
- 👤 Kenneth James Gundry
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 01:27
CPC Classifications
H; H03; H03K; H03K17/00; H03G; H03G9/00; H03G9/005; H03G5/00; H03G5/16; H03G9/02; H03G9/025; H03M; H03M3/00; H03M3/02; H03M3/022; H04; H04B; H04B1/00; H04B1/62; H04B14/00; H04B14/02; H04B14/06; H04B14/062; H04B14/064
Claims Analysis
Total Claims: 51
Claim 1
Independent Claim
114 words
An encoder for converting an analog input signal to a digital signal, comprising a step-size circuit (18) for deriving, from the analog input signal, a control signal with a restricted bandwidth and indicative of a variable conversion step-size, and a first converter (22) for converting the analog input signal to a digital signal, the converter being responsive to the control signal so that the digital signal will be generated in accordance with the variable step-size, characterised by a delay circuit (20) for introducing time delay to the analog input signal before it reaches the first converter (22) to compensate for the slow response of the control signal arising by virtue of its restricted bandwidth.
Claim 2
Dependent Claim
114 words
An encoder for converting an analog input signal to a digital signal, comprising a step-size circuit (18) for deriving, from the analog input signal, a control signal with a restricted bandwidth and indicative of a variable conversion step-size, and a first converter (22) for converting the analog input signal to a digital signal, the converter being responsive to the control signal so that the digital signal will be generated in accordance with the variable step-size, characterised by a delay circuit (20) for introducing time delay to the analog input signal before it reaches the first converter (22) to compensate for the slow response of the control signal arising by virtue of its restricted bandwidth.
Claim 3
Dependent Claim
25 words
An encoder according to claim 1, characterised in that the control signal indicates the step-size required for minimum quantizing error in the first converter (22).
Claim 4
Dependent Claim
19 words
An encoder according to claim 1 or 2, characterised in that the converter (22) is an adaptive delta modulator.
Claim 5
Dependent Claim
22 words
An encoder according to claim 3, characterised in that the adaptive delta modulator (22) includes a leaky integrator with a cut-off frequency.
Claim 6
Dependent Claim
16 words
An encoder according to claim 4, characterised in that the cut-off frequency is about 300 Hz.
Claim 7
Dependent Claim
61 words
An encoder according to claim 4 or 5, characterised in that the step-size circuit (18) is a slope detector which derives the control signal from the slopes of the signal components of the analog input signal with frequencies above the cut-off frequency and from the amplitudes of the signal components of the analog input signal with frequencies below the cut-off frequency.
Claim 8
Dependent Claim
20 words
An encoder according to claim 1, 2 or 3, characterised in that the step-size circuit (18) is a slope detector.
Claim 9
Dependent Claim
34 words
An encoder according to any of claims 1 to 7, characterised in that the step-size circuit (18) includes a bandwidth limitation circuit for limiting the bandwidth of the control signal to the restricted bandwidth.
Claim 10
Dependent Claim
34 words
An encoder according to any of claims 1 to 8, further characterised by a second analog to digital converter (26) for converting the control signal into a digital step-size information bit-stream suitable for transmission.
Claim 11
Dependent Claim
40 words
An encoder according to claim 9, characterised in that the first converter (22) is responsive to the control signal in analog form and by a digital to analog converter (100) deriving the analog control signal from the step-size information bit-stream.
Claim 12
Dependent Claim
23 words
An encoder according to claim 9 or 10, characterised in that the digital step-size information bit-stream represents a non-linear function of the step-size.
Claim 13
Dependent Claim
14 words
An encoder according to claim 11, characterised in that the non-linear function is logarithmic.
Claim 14
Dependent Claim
15 words
An encoder according to claim 11, characterised in that the non-linear function is the square-root.
Claim 15
Dependent Claim
15 words
An encoder according to claim 11, characterised in that the non-linear function is the cube-root.
Claim 16
Dependent Claim
25 words
An encoder according to claim 9, 11, 12, 13 or 14, characterised in that the second analog to digital converter (26) is a delta-sigma modulator.
Claim 17
Dependent Claim
131 words
An encoder-decoder system for converting an analog input signal to a digital signal for transmission and for recovering an analog output signal from the received digital signal, the system comprising a step-size circuit (18) for deriving, from the analog input signal, a first control signal with a restricted bandwidth and indicative of a variable conversion step-size, a first converter (22) for converting the analog input signal to the digital signal, the converter being responsive to the first control signal so that the digital signal will be generated in accordance with the variable step-size, a second converter (42) responsive to the received digital signal and to a second step-size control signal matching the first control signal to generate the analog output signal, characterised by a delay circuit (20) preceding the first converter
Claim 18
Dependent Claim
131 words
An encoder-decoder system for converting an analog input signal to a digital signal for transmission and for recovering an analog output signal from the received digital signal, the system comprising a step-size circuit (18) for deriving, from the analog input signal, a first control signal with a restricted bandwidth and indicative of a variable conversion step-size, a first converter (22) for converting the analog input signal to the digital signal, the converter being responsive to the first control signal so that the digital signal will be generated in accordance with the variable step-size, a second converter (42) responsive to the received digital signal and to a second step-size control signal matching the first control signal to generate the analog output signal, characterised by a delay circuit (20) preceding the first converter
Claim 19
Dependent Claim
40 words
(22) and compensating for the slow response of the first control signal arising by virtue of its restricted bandwidth, and in that the second control signal is derived from the first control signal transmitted along with the said digital signal.
Claim 20
Dependent Claim
40 words
(22) and compensating for the slow response of the first control signal arising by virtue of its restricted bandwidth, and in that the second control signal is derived from the first control signal transmitted along with the said digital signal.
Claim 21
Dependent Claim
38 words
An encoder-decoder system according to claim 16, wherein the first and second control signals are in analog form, characterised by means (26) for converting the first control signal into a step-size information bit-stream suitable for transmission, and means
Claim 22
Dependent Claim
13 words
(44) for converting the received step-size information bit-stream into the second control signal.
Claim 23
Dependent Claim
13 words
(44) for converting the received step-size information bit-stream into the second control signal.
Claim 24
Dependent Claim
56 words
An encoder-decoder system according to claim 17, characterised by means (46) for restricting the bandwidth of the second control signal and in that the said digital signal is transmitted with a delay relative to the said information bit-stream to compensate for the slow response of the second control signal arising by virtue of its restricted bandwidth.
Claim 25
Dependent Claim
80 words
A digital to analog decoder for use in conjunction with an encoder according to claim 1, comprising a converter (42) responsive to the received digital signal and to a step-size control signal to generate an analog output signal, characterised in that the decoder includes a circuit (44, 46) for deriving the step-size control signal from information accompanying the digital signal and which is adapted to operate with such information transmitted time-advanced relative to the digital signal to which it relates.
Claim 26
Dependent Claim
36 words
A decoder according to claim 19, characterised in that the deriving circuit comprises means (46) imposing a bandwidth restriction and hence a slow response of the control signal compensating for the time-advance of the said information.
Claim 27
Dependent Claim
39 words
A decoder according to claim 19 or 20, characterised in that the deriving circuit includes a second converter (44) for converting the said information in digital form to an analog control signal which is subject to the bandwidth restriction.
Claim 28
Dependent Claim
59 words
A digital to analog decoder for use in conjunction with an encoder according to claim 1, comprising a converter (42) responsive to the received digital signal and to a step-size control signal to generate an analog output signal, characterised in that the decoder comprises means (46) imposing a bandwidth restriction and hence a slow response of the control signal.
Claim 29
Dependent Claim
33 words
A decoder according to claim 20 or 22, characterised in that the bandwidth restricting means (46) limit the step-size control signal to such a bandwidth that the converter (42) has substantially linear characteristics.
Claim 30
Dependent Claim
19 words
A decoder according to claim 20, 22 or 23, characterised in that the restricted bandwidth is about 50 Hz.
Claim 31
Dependent Claim
32 words
A decoder according to claim 20, 22 or 23, characterised in that the bandwidth restricting means (46) has a rise time which is substantially in the range of 5 to 20 milliseconds.
Claim 32
Dependent Claim
28 words
A decoder according to claim 21, characterised in that the second converter (44) includes a low pass filter (206) for restricting the bandwidth of the step-size control signal.
Claim 33
Dependent Claim
28 words
A decoder according to claim 26, characterised in that the low pass filter (206) comprises three single pole filters each with a time constant of about 2 milliseconds.
Claim 34
Dependent Claim
40 words
A decoder according to claim 26, wherein the step-size information is in the form of the logarithm of the slope of the analog input signal, further characterised by an exponentiator (208) for exponentiating a control signal transmitted in logarithm form.
Claim 35
Dependent Claim
26 words
A decoder according to claim 27 and claim 28, characterised in that a two pole filter precedes and a single pole filter follows the exponentiator (208).
Claim 36
Dependent Claim
28 words
A decoder according to claim 28, characterised in that the ripple at the input to the exponentiator (208) is restricted to a few percent of its mean level.
Claim 37
Dependent Claim
30 words
A decoder according to any of claims 26 to 30, characterised in that the low pass filter (206) also acts as a delta-sigma demodulator for demodulating the received control signal.
Claim 38
Dependent Claim
55 words
A decoder according to claim 19, 20 or 21, characterised in that the digital signal received by the decoder comprises a single bit stream where the digital representation of the analog input signal and the step-size information are transmitted in the bit stream in a manner that allows them to be distinguished from each other.
Claim 39
Dependent Claim
30 words
A decoder according to claim 19, 20 or 21, characterised in that the digital representation of the analog input signal and the step-size information are transmitted in separate bit streams.
Claim 40
Dependent Claim
21 words
A decoder according to any of claims 19 to 22, characterised in that the converter (42) comprises an adaptive delta demodulator.
Claim 41
Dependent Claim
28 words
A decoder according to claim 34, characterised in that the level changing means adjusts the step-size of the delta demodulator (42) as a fnction of the control signal.
Claim 42
Dependent Claim
44 words
A decoder according to any of claims 19 to 22, characterised in that the converter (42) comprises a delta demodulator and means for changing the level of the_.output analog signal as a function of the step-size control signal, for generating the analog output signal.
Claim 43
Dependent Claim
44 words
A decoder according to claim 36, characterised in that the step-size applied by the delta demodulator (42) is substantially fixed and wherein the level changing means applies a variable gain to the output of the delta demodulator to modulate the analog output signal level.
Claim 44
Dependent Claim
56 words
A decoder according to any of claims 19 to 22, characterised in that the converter (42) includes a leaky integrator (204) and a pulse height modulator (202) responsive to the step-size information to modulate the level of the analog output signal, for generating the analog output signal from the digital representation of the analog input signal.
Claim 45
Dependent Claim
21 words
A decoder according to claim 38, characterised in that the leaky integrator (204) has a time constant of about 0.5 ms.
Claim 46
Dependent Claim
118 words
A digital to analog decoder for converting an input digital signal into an analog signal to provide an output analog signal and for altering the spectral content of the output signal, characterised by the combination of an adaptive delta demodulator (42) for converting the input digital signal into an analog signal to provide the output analog signal in accordance with a step-size control signal, and means (96) for altering the spectral content of the output signal in accordance with a spectral control signal, the step-size and spectral control signals having limited bandwidths so that susbtantially the same output signal is obtained irrespective of the order in which the delta demodulation and altering of the spectral content are performed.
Claim 47
Dependent Claim
118 words
A digital to analog decoder for converting an input digital signal into an analog signal to provide an output analog signal and for altering the spectral content of the output signal, characterised by the combination of an adaptive delta demodulator (42) for converting the input digital signal into an analog signal to provide the output analog signal in accordance with a step-size control signal, and means (96) for altering the spectral content of the output signal in accordance with a spectral control signal, the step-size and spectral control signals having limited bandwidths so that susbtantially the same output signal is obtained irrespective of the order in which the delta demodulation and altering of the spectral content are performed.
Claim 48
Dependent Claim
73 words
A circuit according to claim 40, characterised in that the delta demodulator (42) comprises a fixed delta demodulator (204) and a gain control circuit (202) which is responsive to the step-size control signal for modulating the level of the output signal, so that substantially the same output signal is obtained irrespective of the order in which three processes are performed, namely (a) fixed delta demodulation; (b) spectral content alteration and (c) gain control.
Claim 49
Dependent Claim
44 words
A circuit according to claim 40 or 41, further comprising a fixed low pass filter (118) for filtering the output signal, so that substantially the same output signal is obtained irrespective of the order of performing the fixed filtering together with the other processes.
Claim 50
Dependent Claim
166 words
An encoder-decoder system for converting an analog input signal to a digital signal for transmission and for recovering an analog output signal from the received digital signal, the system comprising a step-size circuit (18) for deriving, from the analog input signal, a first control signal indicative of a variable conversion step-size, a first converter (22) for converting the analog input signal to the digital signal, the converter being responsive to the first control signal so that the digital signal will be generated in accordance with the variable step-size, a second converter (42) responsive to the received digital signal and to a second step-size control signal matching the first control signal to generate the analog output signal, characterised in that the second control signal is derived from the first control signal transmitted along with the said digital signal and in that the said digital signal is transmitted with a delay relative to the said information bit-stream to compensate for the response time of the second control signal.
Claim 51
Dependent Claim
166 words
An encoder-decoder system for converting an analog input signal to a digital signal for transmission and for recovering an analog output signal from the received digital signal, the system comprising a step-size circuit (18) for deriving, from the analog input signal, a first control signal indicative of a variable conversion step-size, a first converter (22) for converting the analog input signal to the digital signal, the converter being responsive to the first control signal so that the digital signal will be generated in accordance with the variable step-size, a second converter (42) responsive to the received digital signal and to a second step-size control signal matching the first control signal to generate the analog output signal, characterised in that the second control signal is derived from the first control signal transmitted along with the said digital signal and in that the said digital signal is transmitted with a delay relative to the said information bit-stream to compensate for the response time of the second control signal.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.