EP0155698A2
Expired / Lapsed
EP
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A method for manufacturing a semiconductor integrated circuit device provided with an improved isolation structure
Assignee: NEC Corp
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Filing: 1985-03-22
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Granted: —
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Expires: 2005-03-22
Abstract
Abstract An improved isolation structure of integrated circuit devices are formed by forming grooves at a main surface of semiconductor substrate, forming an insulator film on side walls of the grooves and the main surface, the bottom of the grooves exposing the semiconductor substrate, depositing single crystal semiconductor in the grooves by selective depositing technique without depositting the single crystal semiconductor on the main surface, the grooves being substantially filled with the single crystal semiconductor, and forming circuit element in the semiconductor substrate at the main surface and/or the deposited single crystal semiconductor. The side walls of the grooves are preferably formed of crystal planes within ±8° from [100] planes of the semiconductor substrate to obtain a flat surface of the deposited single crystal semiconductor.
Inventors
- 👤 Nobuhiro Endo
- 👤 Naoki Kasai
- 👤 Masao Tajima
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-25 21:23
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/018; H10D; H10D62/00; H10D62/40; H10D62/405; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10W10/10
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
93 words
A method for manufacturing a semiconductor device comprising steps of: forming at least one groove in a semiconductor substrate at a main surface of said semiconductor substrate; forming an insulating film on side walls of said groove, the bottom of said groove being exposed; forming crystalline semiconductor in said groove by selective deposition technique which does not form said crystal ine semiconductor on said main surface of said semiconductor substrate, said groove being substantially filled with said crystalline semiconductor; and forming at least one circuit element on said surface of said semiconductor substrate.
Claim 2
Independent Claim
93 words
A method for manufacturing a semiconductor device comprising steps of: forming at least one groove in a semiconductor substrate at a main surface of said semiconductor substrate; forming an insulating film on side walls of said groove, the bottom of said groove being exposed; forming crystalline semiconductor in said groove by selective deposition technique which does not form said crystal ine semiconductor on said main surface of said semiconductor substrate, said groove being substantially filled with said crystalline semiconductor; and forming at least one circuit element on said surface of said semiconductor substrate.
Claim 3
Independent Claim
31 words
A method for manufacturing a semiconductor device as claimed in clain 1, wherein said side walls of said groove are crystal planes within ±8° from (100) planes of said semiconductor substrate.
Claim 4
Dependent Claim
23 words
A method for manufacturing a semiconductor device as claimed in claim 2, wherein said main surface of said semiconductor substrate is (100) plane.
Claim 5
Dependent Claim
23 words
A method for manufacturing a semiconductor device as claimed in claim 2, wherein said semiconductor substrate and said crystalline semiconductor are silicon. v
Claim 6
Dependent Claim
22 words
A method for manufacturing a semiconductor device as claimed in claim 3, wherein said semiconductor substrate and said crystalline semiconductor are silicon.
Claim 7
Independent Claim
100 words
A method for manufacturing an integrated circuit comprising steps of: forming a plural number of grooves at main surface of a semiconductor substrate; forming insulating films on side walls of said grooves and said main surface, the bottom of said grooves expos.ng said semiconductor substrate; forming single crystal semiconductor in said groove by selective deposition technique without depositing said single crystal semiconductor on said main surface, said grooves being substantially filled with said single crystal semiconductor; and forming a plurality of circuit element in said semiconductor substrate at said main surface and in said single crystal semiconductor in said grooves.
Claim 8
Independent Claim
100 words
A method for manufacturing an integrated circuit comprising steps of: forming a plural number of grooves at main surface of a semiconductor substrate; forming insulating films on side walls of said grooves and said main surface, the bottom of said grooves expos.ng said semiconductor substrate; forming single crystal semiconductor in said groove by selective deposition technique without depositing said single crystal semiconductor on said main surface, said grooves being substantially filled with said single crystal semiconductor; and forming a plurality of circuit element in said semiconductor substrate at said main surface and in said single crystal semiconductor in said grooves.
Claim 9
Dependent Claim
31 words
A method for manufacturing an integrated circuit as claimed in claim 6, wherein said side walls of said grooves are crystal planes within ±8° from [100] planes of said semiconductor substrate.
Claim 10
Dependent Claim
34 words
' A method for manufacturing an integrated circuit as claimed in claim 7, wherein said semiconductor substrate is a silicon substrate having said main surface of (100) plane, said single crystal semiconductor being silicon.
Claim 11
Dependent Claim
26 words
A method for manufacturing an integrated circuit as claimed in claim 8, wherein said semiconductor substrate and said single crystal semiconductor are the same conductivity type.
Claim 12
Dependent Claim
28 words
A method for manufacturing an integrated circuit as claimed in claim 8, wherein said semiconductor substrate and said single crystal semiconductor are different conductivity types from each other.
Claim 13
Independent Claim
90 words
A method for manufacturing an integrated circuit comprising steps of: forming at least one groove at a main surface of a semiconductor substrate; forming an insulating film on side walls of said groove and said main surface, the bottom of said groove exposing said semiconductor substrate; forming single crystal semiconductor in said groove by selective deposition technique without depositing said single crystal semiconductor on said main surface; forming a thick insulator film on said single crystal semiconductor; and forming a circuit element in said semiconductor substrate at said main surface.
Claim 14
Independent Claim
90 words
A method for manufacturing an integrated circuit comprising steps of: forming at least one groove at a main surface of a semiconductor substrate; forming an insulating film on side walls of said groove and said main surface, the bottom of said groove exposing said semiconductor substrate; forming single crystal semiconductor in said groove by selective deposition technique without depositing said single crystal semiconductor on said main surface; forming a thick insulator film on said single crystal semiconductor; and forming a circuit element in said semiconductor substrate at said main surface.
Claim 15
Dependent Claim
31 words
A method for manufacturing an integrated circuit as claimed in claim 11, wherein said side walls of said groove are crystal planes within ±8° from (100) planes of said semiconductor substrate.
Claim 16
Dependent Claim
33 words
A method for manufacturing an integrated circuit as claimed in claim 12, wherein said semiconductor substrate is a silicon substrate having a main surface of (100) plane, said single crystal semiconductor being silicon.
Claim 17
Dependent Claim
38 words
A method for manufacturing an integrated circuit as claimed in claim 12, wherein said semiconductor substrate and said single crystalline semiconductor are the same conductivity type, said single crystal semiconductor having a lower resistivity than said semiconductor substrate.
Claim 18
Dependent Claim
74 words
An integrated circuit comprising: a semiconductor substrate having a plurality of grooves at a main surface; ian insulator film formed on side walls of said grooves, the bottoms of said grooves being not covered with said insulator film: single crystal semiconductor regions formed in said grooves in electrically contact with said semiconductor substrate at said bottoms of said grooves; and a plurality of circuit elements formed in said semiconductor substrate at said main surface.
Claim 19
Dependent Claim
74 words
An integrated circuit comprising: a semiconductor substrate having a plurality of grooves at a main surface; ian insulator film formed on side walls of said grooves, the bottoms of said grooves being not covered with said insulator film: single crystal semiconductor regions formed in said grooves in electrically contact with said semiconductor substrate at said bottoms of said grooves; and a plurality of circuit elements formed in said semiconductor substrate at said main surface.
Claim 20
Dependent Claim
28 words
An integrated circuit as claimed in claim 15, wherein said side walls of said grooves are formed of crystal planes within±8° from (100) planes of said semiconductor substrate.
Claim 21
Dependent Claim
36 words
An integrated circuit as claimed in claim 16, wherein the conductivity types of said semiconductor substrate and said single crystal semiconductor regions are the same, said single crystal semiconductor regions being covered with thick oxide films.
Claim 22
Dependent Claim
39 words
An integrated circuit as claimed in claim 16, wherein the conductivity, types of said semiconductor substrate and said single crystal semiconductor regions are the same, a plurality of other circuit elements being formed in said single crystal semiconductor regions.
Claim 23
Dependent Claim
49 words
An integrated circuit as claimed in claim 16, wherein the conductivity types of said semiconductor substrate and said single crystal semiconductor regions are different from each other, a plurality of other circuit elements which have different characteristics from said circuit elements being formed in said single crystal semiconductor regions.
References Cited (Backward Citations)
No citation records indexed.
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