EP0157342A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Memory address expansion system
Assignee: ASCII Corp
•
Filing: 1985-03-26
•
Granted: —
•
Expires: 2005-03-26
Abstract
Abstract An improved memory address expansion system is disclosed which provides for easy memory control by software and for smooth control of an ROM cartridge when it is inserted, also which can be used in common in various kinds of systems including large-/small-configuration systems. In this memory address expansion system, there are established a plurality of pages each consisting of 16K bytes contained in a memory address space, there are established a plurality of primary slots each consisting of four such pages, and there can be established a plurality of secondary slots, there being four for each primary slot, so that a slot to be used can be specified for each of these pages, by using selection means (14, 21).
Inventors
- 👤 Takatoshi Ishii
- 👤 Ryozo Yamashita
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 23:48
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/06; G06F12/0615; G06F12/0623
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
70 words
A memory address expansion system, characterized in that there are set up a plurality of pages each consisting of a predetermined number of bytes in a memory address space, there are set up a plurality of slots each consisting of a predetermined number of said pages, and there are provided means (14) for specifying a slot to be used for each of said pages, thereby expanding a memory address equivalently.
Claim 2
Dependent Claim
70 words
A memory address expansion system, characterized in that there are set up a plurality of pages each consisting of a predetermined number of bytes in a memory address space, there are set up a plurality of slots each consisting of a predetermined number of said pages, and there are provided means (14) for specifying a slot to be used for each of said pages, thereby expanding a memory address equivalently.
Claim 3
Dependent Claim
78 words
A memory address expansion system, characterized by means for setting up a plurality of pages each consisting of a predetermined number of bytes in a memory address space and a plurality of primary slots each consisting of a predetermined number of said pages, and capable. to set up a plurality of secondary slots each consisting of a predetermined number of said primary slots; and, means (14,21) for specifying a slot to be used for each of said pages.
Claim 4
Dependent Claim
78 words
A memory address expansion system, characterized by means for setting up a plurality of pages each consisting of a predetermined number of bytes in a memory address space and a plurality of primary slots each consisting of a predetermined number of said pages, and capable. to set up a plurality of secondary slots each consisting of a predetermined number of said primary slots; and, means (14,21) for specifying a slot to be used for each of said pages.
Claim 5
Dependent Claim
42 words
The memory address expansion system as set forth in Claim 2 , characterized in that said predetermined number of bytes is 16K bytes, said predetermined number of said primary slots is four, and said predetermined number of said secondary slots is four.
Claim 6
Dependent Claim
101 words
The memory address expansion system as set forth in Claim 1 or 2, . characterized in that said means for specifying said slot for said each page are registers (14,21) provided on a memory map, and also that there are provided circuits (20) responsive to the read operations of said registers to obtain the complements of the values previously written into said registers so as to make it possible to judge whether said registers exist on said memory map, so that said registers can specify said slot for said each page in accordance with the values read by said registers themselves.
Claim 7
Dependent Claim
55 words
A register provided on a memory map, said register being characterized in that there is provided a circuit (20) responsive to the read operation of said register to obtain the complements of the values previously written into said register so as to make it possible to judge whether said register exists on said memory map.
Claim 8
Dependent Claim
55 words
A register provided on a memory map, said register being characterized in that there is provided a circuit (20) responsive to the read operation of said register to obtain the complements of the values previously written into said register so as to make it possible to judge whether said register exists on said memory map.
Claim 9
Dependent Claim
64 words
The memory address expansion system as set forth in Claim 1 or 2, characterized in that there is provided a slot control table as a header for said memory pages, and there is provided a slot control program adapted to define a given format which permits initialization and system call so that said memory address expansion system can hold its systematic integration and expandability.
Claim 10
Dependent Claim
56 words
The memory address expansion system as set forth in Claim 6, characterized in that there is provided an ID byte forming a system identification code so as to be able to identify whether a program currently present belongs to the same system, so that said memory address expansion system can hold its systematic integration and interchangeability.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.