EP0175499A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Display system for computers
Assignee: EMC Corp
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Filing: 1985-08-22
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Granted: —
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Expires: 2005-08-22
Abstract
Abstract 57 A CPU communicates over a bus (203) with a liquid crystal display (LCD) device (209) by way of a control unit (217), a d is- play memory (213) and another control unit (219). The memory (213) includes a screen image RAM (223) which is a pixel memory cyclically accessed by the latter control unit (219) to keep the display refreshed. The former control unit (217) keeps the contents of the screen image RAM (223) updated in accordance with ASCII codes in a RAM (221), each with an associated attribute code. The control unit (217) converts ASCH character codes into corresponding groups of pixel codes wroten into the screen image RAM (223) by reference to a font partern RAM (225:. ASCll graphic coaes are passed to the scream image RAM (223) without conversion but, in eitner envents the atribute codes selectively modify what goes to the screen image RAM (223), on a character by character ba- sis whether normal or reverse video is emproved. blinking characters are employed , a high speed, imperceptible blio a employed to provide an intermediate visual tone and to imprentent a form of colour emuration to which colour codes in the attribute codes seiect the backgrouna tone (and complementary freground tone) of the display.
Inventors
- 👤 Kazuhiro Miyashita
- 👤 Hideji Katayama
- 👤 Etsuo Iijima
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 19:54
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/2007; G09G3/2018
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
31 words
A method of operating a liquid crystal display to provide at least one intermediate tone, characterised in that the display is blinked at a rate too high to be visually perceptible.
Claim 2
Independent Claim
31 words
A method of operating a liquid crystal display to provide at least one intermediate tone, characterised in that the display is blinked at a rate too high to be visually perceptible.
Claim 3
Dependent Claim
134 words
A control system for a liquid crystal display device (209) capable of presenting first and second visual tones, comprising means (517, 519) for receiving data to be displayed, the data having first and second values for causing the display device to display the first and second tones respectively, and means (525, 527, 223, 219) for supplying signals to the display device in accordance with the data, characterised by switch means (1609) between the receiving means (517, 519) and the signal supplying means (525, 527, 223, 219) for selecting between the said data and the said second value, and means (1611, DIMBLK) for operating the switch means (1609) at a rate sufficient to cause data with the first value to be displayed with the appearance of a constant tone intermediate the first and second tones.
Claim 4
Dependent Claim
134 words
A control system for a liquid crystal display device (209) capable of presenting first and second visual tones, comprising means (517, 519) for receiving data to be displayed, the data having first and second values for causing the display device to display the first and second tones respectively, and means (525, 527, 223, 219) for supplying signals to the display device in accordance with the data, characterised by switch means (1609) between the receiving means (517, 519) and the signal supplying means (525, 527, 223, 219) for selecting between the said data and the said second value, and means (1611, DIMBLK) for operating the switch means (1609) at a rate sufficient to cause data with the first value to be displayed with the appearance of a constant tone intermediate the first and second tones.
Claim 5
Dependent Claim
117 words
A control system according to claim 2, wherein the display device (209) has an array of display pixels which are individually turned on and off to display the first and second tones respectively in response to the first and second data values respectively, characterised in that the switch means comprise an AND gate (1609) having a first input connected to the receiving means (517, 519, 1601, 1603), and an output connected to the supplying means (525, 527, 223, 219), and in that the operating means comprise a source (2209, 2211) of clock pulses (DIMBLK) at the said rate, and a gating circuit (1611) for selectively applying these pulses to a second input of the AND gate (1609).
Claim 6
Dependent Claim
42 words
A control system according to claim 3, characterised in that the gating circuit (1609) is a second AND gate having inputs to which are applied the clock pulses (DIMBLK) and a control signal (DIMEN) for enabling and disabling the intermediate tone display.
Claim 7
Dependent Claim
91 words
A control system according to claim 2, 3 or 4, characterised by means (511, 513) for receiving character codes accompanied by attribute codes, means (225) for generating the said data from the character codes, and means (523) responsive to the attibute codes to determine on a character by character basis whether a characters is to be displayed with the first and second tones or with the first and intermediate tones, and to provide a control signal (DIMEN) accordingly, which control signal determines whether the operating means (1611, DIMBLK) function or not.
Claim 8
Independent Claim
143 words
A system for generating data to be displayed by a display device (209) with an array of rows and columns of display pixels, characterised by the combination of a code memory (221) for storing data words identifying characters to be displayed by the display device (209), a font translation memory (225), addressable with addresses formed from said data words, for outputting pixel data corresponding to the data words, a display image memory (223) for storing the pixel data, means (219) responsive to the stored pixel data for driving the array of display pixels to display the characters, and a control circuit (217) for accessing the data words stored in the code memory (221), for forming the said addresses and accessing the corresponding pixel data in said font translation memory (225), and for storing the output pixel data in the display image memory (223).
Claim 9
Independent Claim
143 words
A system for generating data to be displayed by a display device (209) with an array of rows and columns of display pixels, characterised by the combination of a code memory (221) for storing data words identifying characters to be displayed by the display device (209), a font translation memory (225), addressable with addresses formed from said data words, for outputting pixel data corresponding to the data words, a display image memory (223) for storing the pixel data, means (219) responsive to the stored pixel data for driving the array of display pixels to display the characters, and a control circuit (217) for accessing the data words stored in the code memory (221), for forming the said addresses and accessing the corresponding pixel data in said font translation memory (225), and for storing the output pixel data in the display image memory (223).
Claim 10
Dependent Claim
52 words
A system according to claim 6, characterised in that each of the data words stored in the code memory (221) has an associated attribute word stored therewith, by a plurality of registers (R1-R31) for controlling the control circuit in accordance with the values of the attribute words associated with the data words.
Claim 11
Dependent Claim
23 words
A system according to claim 7, characterised by a register initiation circuit (503) for selectively supplying control data to the control registers (R1-R31).
Claim 12
Dependent Claim
70 words
A system according to claim 7 or 8, characterised by an address generation circuit (1801, 1803, 1805, 1807) for generating addresses in the code memory (221) of the stored data words and associated attribute words, the control circuit (217) including a code memory read latch (511, 513) for receiving the data words and associated attribute words stored in the code memory (221) at the addresses generated by the address generator.
Claim 13
Dependent Claim
77 words
A system according to claim 9, characterised in that the control registers (R1-R31) include a font selected register (R22) for supplying selected bits of an address in the font translation memory (225) and in that the control circuit (217) includes a font address circuit (515) for generating the addresses in the font translation memory by combining the selected bits from the font select register with the data words received by the code memory read latch (511). -
Claim 14
Dependent Claim
59 words
A system according to claim 9 or 10, characterised by a font data latch (517, 519) for receiving the pixel data output by the font translation memory (225), and an attribute processing path (521) for selectively altering the values of the pixel data in accordance with the attribute words associated with the data words corresponding to the pixel data.
Claim 15
Dependent Claim
73 words
A system according to claim 11, characterised in that the attribute processing path (521) includes a first pixel data output latch (525, 527) for outputting characters to be displayed with a first width corresponding to a first number of pixels, and a second pixel data output latch (529, 531) for outputting characters to be displayed with a second width corresponding to a second number of pixels greater than the first number of pixels.
Claim 16
Independent Claim
40 words
A system according to any of claims 6 to 12, characterised in that the font translation memory (225) includes a plurality of sections for outputting different pixel data corresponding to the data words, for displaying characters having different visual appearances.
Claim 17
Independent Claim
36 words
A system according to any of claims 6 to 13, characterised in that code memory (221), the font translation memory (225) and the display image memory (223) comprise separate segments of a random access memory (213).
Claim 18
Dependent Claim
32 words
A system according to claim 9, characterised by an image data path for transferring the data words received by the code memory read latch (511) directly to the display image memory (223).
Claim 19
Independent Claim
112 words
A system for controlling a monochrome display to emulate a colour display, comprising means (517, 519, 513) for receiving display signals including a data portion for display and an associated control portion indicating foreground and background colours with which the data portion is to be displayed on a colour display; a colour emulation circuit (1501) responsive to the control portion of the display signals for translating each combination of foreground and background colours to selected monochromatic display control signals (BGDARK), and a data conversion circuit (1621, 1623) for setting the value of the data portion of the display signals in accordance with the corresponding control signals from the colour emulation circuit (1501).
Claim 20
Independent Claim
112 words
A system for controlling a monochrome display to emulate a colour display, comprising means (517, 519, 513) for receiving display signals including a data portion for display and an associated control portion indicating foreground and background colours with which the data portion is to be displayed on a colour display; a colour emulation circuit (1501) responsive to the control portion of the display signals for translating each combination of foreground and background colours to selected monochromatic display control signals (BGDARK), and a data conversion circuit (1621, 1623) for setting the value of the data portion of the display signals in accordance with the corresponding control signals from the colour emulation circuit (1501).
Claim 21
Dependent Claim
56 words
A system according to claim 16, in combination with a monochrome liquid crystal display (209) having an array of display pixels capable of first and second visual states, and wherein the data portion of the display signals has first and second values to cause display pixels to be in the first and second visual states respectively.
Claim 22
Dependent Claim
79 words
A system according to claim 17, characterised in that the colour emulation circuit comprises a background colour decoder (1501) for outputting a second state control signal (BGDARK) responsive to a selected combination of the background colours indicated by the control portion of the display signals; and a foreground colour decoder (1511) for outputting a reverse video signal (RVVID) in response to a selected combination of the foreground and background colours indicated by the control portion of the display signals.
Claim 23
Dependent Claim
150 words
A system according to claim 18, characterised in that the data conversion circuit comprises a NOR gate circuit (1621) having a first input for receiving the data portion of the display signals, a second input, and an output; and an OR gate circuit (1623) having a first input for receiving the reverse video signal (RVVID), a second input for receiving the second state control signal (BGDARK) and an output connected to the second input of the NOR gate circuit (1621), the NOR gate circuit outputting the data portion having a value to cause display pixels in the display to assume the second visual state in response to the occurrence of the second state control signal (BGDARK) and to assume an inverse value with respect to the value thereof supplied to the first input terminal of the NOR gate circuit in response to the occurrence of the reverse video signal (RVVID).
Claim 24
Independent Claim
30 words
A system according to any of claims 16 to 19, characterised by means (R23, (919)) for selecting between a plurality of different translation modes of the colour emulation circuit (1501).
Claim 25
Independent Claim
182 words
A system for controlling a liquid crystal display device (209) capable of displaying first and second visual tones to emulate the colour display of a cathode ray tube, comprising means for receiving display signals (517, 519, 513) which would control the cathode ray tube to produce a colour display, the display signals including a data portion for display and an associated control portion indicating foreground and background colours with which the associated data portion would be displayed on the cathode ray tube; a colour decoder circuit (1501, 1511) for generating display control signals responsive to the foreground and background colours indicated in the control portion; and a display data translation circuit (1621, 1623) for selectively changing the value of the display portion in accordance with the display control signals, whereby the value of the display portion is arithmetically complemented, is set to a value that controls the display to display the second visual tone, or is not changed whereby the liquid crystal display assumes selected display states in response to the indication of colours to be displayed on the cathode ray tube.
Claim 26
Independent Claim
182 words
A system for controlling a liquid crystal display device (209) capable of displaying first and second visual tones to emulate the colour display of a cathode ray tube, comprising means for receiving display signals (517, 519, 513) which would control the cathode ray tube to produce a colour display, the display signals including a data portion for display and an associated control portion indicating foreground and background colours with which the associated data portion would be displayed on the cathode ray tube; a colour decoder circuit (1501, 1511) for generating display control signals responsive to the foreground and background colours indicated in the control portion; and a display data translation circuit (1621, 1623) for selectively changing the value of the display portion in accordance with the display control signals, whereby the value of the display portion is arithmetically complemented, is set to a value that controls the display to display the second visual tone, or is not changed whereby the liquid crystal display assumes selected display states in response to the indication of colours to be displayed on the cathode ray tube.
Claim 27
Independent Claim
92 words
A system for controlling a liquid crystal display, comprising a display memory for addressably storing at associated addresses data to be displayed by the display; means for supplying addresses of data in the memory and for accessing the data in accordance with said addresses; means for converting said addresses into corresponding display position signals for the display; and means for transferring to the display said display position signals and the associated display data, whereby the display data is displayed at display positions of the display corresponding to the associated display position signals.
Claim 28
Independent Claim
92 words
A system for controlling a liquid crystal display, comprising a display memory for addressably storing at associated addresses data to be displayed by the display; means for supplying addresses of data in the memory and for accessing the data in accordance with said addresses; means for converting said addresses into corresponding display position signals for the display; and means for transferring to the display said display position signals and the associated display data, whereby the display data is displayed at display positions of the display corresponding to the associated display position signals.
Claim 29
Dependent Claim
64 words
A system according to claim 22, characterised in that the display includes a numbered sequence of display pixels arranged in a matrix of rows and columns for displaying the display data and wherein the converting means comprises an offset counter for generating pixel offset values indicating the display pixels in the sequence of display pixels wherein the transferred display data is to be displayed.
Claim 30
Dependent Claim
110 words
A system according to claim 23, characterised by a pixel column counter, incremented in response to each transfer of display data, for generating a row overflow signal when the count stored therein is equal to the maximum number of pixels in a row of the matrix and for being reset responsive to the generation of the row overflow signal; and a pixel row counter, incremented in response to the generation of the row overflow signal, for generating a reset signal when the count stored therein is equal to the maximum number of rows of pixels of the matrix and for being reset responsive to the generation of the reset signal.
Claim 31
Dependent Claim
92 words
A system according to claim 24, characterised in that the offset counter comprises a pixel counter incremented in response to each transfer of display data to the display; an offset adder incremented by a value equal to the number of pixels in a row of the matrix in response to the row overflow signal; and a register for transferring the contents of the offset adder to the pixel counter in response to the row overflow signal, the pixel counter and offset adder being reset to zero in response to the reset signal.
Claim 32
Independent Claim
153 words
A system for controlling a liquid crystal display which includes a plurality of display segments comprising a display memory for storing data to be displayed by the display, the memory including a plurality of storage locations for storing the display data with each of the storage locations having an associated address; means for supplying addresses of the storage locations in the memory and for accessing, in response to each supplied address, data to be displayed in each of the display segments; means for converting each of the supplied addresses into a corresponding display position signal within each of the segments of the display; and means for transferring in parallel the accessed data to be displayed in each segment of the display and the display position signal whereby data is simultaneously displayed at selected display positions of each segment of the display responsive to the supplying of a single address in the display memory.
Claim 33
Independent Claim
153 words
A system for controlling a liquid crystal display which includes a plurality of display segments comprising a display memory for storing data to be displayed by the display, the memory including a plurality of storage locations for storing the display data with each of the storage locations having an associated address; means for supplying addresses of the storage locations in the memory and for accessing, in response to each supplied address, data to be displayed in each of the display segments; means for converting each of the supplied addresses into a corresponding display position signal within each of the segments of the display; and means for transferring in parallel the accessed data to be displayed in each segment of the display and the display position signal whereby data is simultaneously displayed at selected display positions of each segment of the display responsive to the supplying of a single address in the display memory.
Claim 34
Dependent Claim
52 words
A system according to claim 26, characterised in that the display includes four display segments and the transferring means comprises four multiplexers, each of the multiplexers having an output connected to a different one of the display segments and an input connected to the display memory for receiving the display data therefrom.
Claim 35
Dependent Claim
39 words
A system according to claim 27, characterised in that the storage locations of the display memory are divided into four memory segments, each of the memory segments being associated with a different one of the multiplexers and display segments.
Claim 36
Dependent Claim
105 words
A system according to claim 28, characterised in that the display includes a numbered sequence of display pixels arranged in a matrix of rows and columns and in that each of the segments of the display includes an initial display pixel associated with a segment offset indicating the position of the initial display pixel within the numbered sequence of display pixels and in that the converting means comprises an offset counter for generating in association with each transfer of display data a pixel offset value indicating the display pixel in the sequence of display pixels wherein the associated transferred display data is to be displayed.
Claim 37
Dependent Claim
109 words
A system according to claim 29, characterised by a pixel counter, incremented in response to each transfer of display data, for generating a row overflow signal when the count stored therein is equal to the maximum number of pixels in a row of the matrix and for being reset responsive to the generation of the row overflow signal; and a pixel row counter, incremented in response to the generation of the row overflow signal, for generating a reset signal when the count stored therein is equal to the maximum number of rows of pixels of the matrix and for being reset responsive to the generation of the reset signal.
Claim 38
Dependent Claim
135 words
A system according to claim 30, characterised in that the offset counter comprises a pixel counter incremented in response to each transfer of display data to the display; an offset adder incremented by a value equal to the number of pixels in a row of the matrix in response to the row overflow signal; a register for transferring the contents of the offset adder to said pixel counter in response to the row overflow signal, the pixel counter and offset adder being reset to zero in response to the reset signal; and a segment offset adder for adding the contents of the pixel counter and the segment offset associated with a selected one of the display segments to generate the pixel position associated with display data being transferred to the selected segment of the display.
References Cited (Backward Citations)
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