EP0182097A2
Expired / Lapsed
EP
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Serially attached video adapter
Assignee: International Business Machines Corp
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Filing: 1985-10-15
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Granted: —
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Expires: 2005-10-15
Abstract
Abstract ® A circuit arrangement (adapter) for attaching a display device to a serial I/O channel is disclosed. The circuit arrangement captures a serial message of indeterminate length and places said message unit into a refresh RAM in a synchronous manner during non-display periods. The circuit arrangement includes a microprocessor (24) whose address and data buses (48, 26) are coupled to a microprocessor RAM (80) and through control circuitry to the address and data buses of a refresh RAM. Data is transferred at high speed from the serial I/O channel to the microprocessor RAM. When the microprocessor executes a read command, the microprocessor RAM is placed in a "read mode" while the refresh or display RAM (32) is placed in a "write" mode. Data at the address selected in the microprocessor RAM is transferred to an identical address in the refresh RAM. Similarly, data can be transferred from the refresh RAM into the microprocessor RAM. Thus, the execution of a single command at a single address results in the selection of two RAMs.
Inventors
- 👤 John David Landers, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 16:53
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/22; G09G5/222; G06; G06F; G06F3/00; G06F3/14
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
209 words
An adapter for interfacing a display device with a serial data link comprising: a first storage means operable for storing data being supplied from the serial data link; a second storage means operable for storing display data; an address bus coupled to the second storage means; a data bus coupled to the second storage means; a microprocessor coupled to the serial data link and operable for generating enabling signals; a common address bus interconnecting the first storage means and the microprocessor; a common data bus interconnecting the first storage means and the microprocessor; a first control means operable for controlling the flow of data between the data bus and the common data bus; a second control means operable for interconnecting the address bus and the common address bus; a third control means being responsive to the enabling signals and operable for enabling the control means so that upon the execution of a first command by the microprocessor data residing at a selected address in the first storage means is being transferred to the identical address in the second storage means and the execution of the first command by the microprocessor data residing at said selected address in the second storage means is being transferred to the first storage means.
Claim 2
Dependent Claim
209 words
An adapter for interfacing a display device with a serial data link comprising: a first storage means operable for storing data being supplied from the serial data link; a second storage means operable for storing display data; an address bus coupled to the second storage means; a data bus coupled to the second storage means; a microprocessor coupled to the serial data link and operable for generating enabling signals; a common address bus interconnecting the first storage means and the microprocessor; a common data bus interconnecting the first storage means and the microprocessor; a first control means operable for controlling the flow of data between the data bus and the common data bus; a second control means operable for interconnecting the address bus and the common address bus; a third control means being responsive to the enabling signals and operable for enabling the control means so that upon the execution of a first command by the microprocessor data residing at a selected address in the first storage means is being transferred to the identical address in the second storage means and the execution of the first command by the microprocessor data residing at said selected address in the second storage means is being transferred to the first storage means.
Claim 3
Dependent Claim
29 words
The adapter of claim 1 further including means coupled to the second storage means and operable for generating a stream of video data for displaying on said display device.
Claim 4
Dependent Claim
13 words
The adapter of claim 1 wherein the storage means includes a RAM device.
Claim 5
Dependent Claim
30 words
The adapter of claim 1 wherein the third means includes combinatorial logic circuitry operable for monitoring predetermined logic levels at said microprocessor and to generate a series of enabling signals.
Claim 6
Dependent Claim
162 words
An adapter for interfacing a display device with a serial data link comprising: a first storage means operable for storing data being supplied from the serial data link; a second storage means operable for storing display data; an address bus coupled to the second storage means; a data bus coupled to the second storage means; a microprocessor coupled to the serial data link and operable for generating enabling signals; a common address bus interconnecting the first storage means and the microprocessor; a common data bus interconnecting the first storage means and the microprocessor; a first control means operable for controlling the flow of data between the data bus and the common data bus; a second control means operable for interconnecting the address bus and the common address bus; a third control means being responsive to the enabling signals and operable to cause the selection of the first and the second storage means upon the execution of a single command by said microprocessor.
Claim 7
Dependent Claim
162 words
An adapter for interfacing a display device with a serial data link comprising: a first storage means operable for storing data being supplied from the serial data link; a second storage means operable for storing display data; an address bus coupled to the second storage means; a data bus coupled to the second storage means; a microprocessor coupled to the serial data link and operable for generating enabling signals; a common address bus interconnecting the first storage means and the microprocessor; a common data bus interconnecting the first storage means and the microprocessor; a first control means operable for controlling the flow of data between the data bus and the common data bus; a second control means operable for interconnecting the address bus and the common address bus; a third control means being responsive to the enabling signals and operable to cause the selection of the first and the second storage means upon the execution of a single command by said microprocessor.
Claim 8
Independent Claim
110 words
A method for moving (transporting) data within a computing system having at least two storage devices and a microprocessor for controlling said computer system comprising the steps of: providing a common data bus for interconnecting the microprocessor and the storage devices; providing a common address bus for interconnecting the microprocessor storage devices; providing switching means for controlling the flow of data on the respective buses; enabling the processor to perform a read operation; placing one storage device in a read mode; placing the other storage device in a write mode, and setting the switching means thereby enabling data to be transferred from one storage device into the other storage device.
Claim 9
Independent Claim
110 words
A method for moving (transporting) data within a computing system having at least two storage devices and a microprocessor for controlling said computer system comprising the steps of: providing a common data bus for interconnecting the microprocessor and the storage devices; providing a common address bus for interconnecting the microprocessor storage devices; providing switching means for controlling the flow of data on the respective buses; enabling the processor to perform a read operation; placing one storage device in a read mode; placing the other storage device in a write mode, and setting the switching means thereby enabling data to be transferred from one storage device into the other storage device.
References Cited (Backward Citations)
No citation records indexed.
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