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EP0182454A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Video system controller with a row address override circuit

Assignee: Texas Instruments Inc
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Filing: 1985-07-23
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Granted: —
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Expires: 2005-07-23
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Abstract

Abstract The present invention is a video system which includes a data processor (1), such as a microprocessor, for processing data, a video memory (5) for storing data from the data processor corresponding to an image to be displayed, a display (11), such as a raster scan cathode ray tube, for displaying the image data stored in the video memory means, and a video system controller (3) connected to the video memory (5) for controlling the transfer of data from the video memory (5) to the display (11) and between the data processor (1) and the video memory (5). The video memory (5) is preferrably a multiport dynamic randon access memory including an addressable memory array. The video system controller (3) performs a number of functions including refresh of the dynamic random access memory, multiplexing of the various access requests of the video memory and control of the blanking interval of the display. This is accomplished by having a first portion which operates synchronously with the video memory (5) and a second portion which operates synchronously with the data processor (1). The transfer operations in the video system controller are preferrably controlled through the use of a programmable state machine which manipulates inputs in a logic array.

Inventors

  • 👤 Jeffrey C. Bond
  • 👤 Karl M. Guttag
  • 👤 Robert C. Thaden
  • 👤 Raymond Pinkham
  • 👤 Mark Novak
  • 👤 Mark W. Watts
  • 👤 Jerry Vanaken
  • 👤 John V. Moravec
  • 👤 Rudy J. Albachten, Iii

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-06 23:43
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/001; G09G5/003; G09G5/005; G09G5/36; G09G5/363; G09G5/39; G09G5/391; G09G5/393; G09G5/395; G09G5/397; G09G2310/00; G09G2310/06; G09G2310/061; G09G2360/00; G09G2360/12; G09G2360/126; G09G2360/128; G09G2360/18; G09G5/399

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 73 words
A video system comprising: a processor means for processing data; a memory means connected to said processor means for storing therein said processed data; a display means connected to said memory means for displaying said data stored in said memory means; and a control means connected to said memory means for controlling the transfer of data from said memory means to said display means and between said processor means and said memory means.
Claim 2
Dependent Claim 73 words
A video system comprising: a processor means for processing data; a memory means connected to said processor means for storing therein said processed data; a display means connected to said memory means for displaying said data stored in said memory means; and a control means connected to said memory means for controlling the transfer of data from said memory means to said display means and between said processor means and said memory means.
Claim 3
Dependent Claim 111 words
A video system according to claim I, wherein: said display means includes a raster scan cathode ray tube; said processor means processes data including raster position codes corresponding to the position of said raster scan on said cathode ray tube; said memory means includes an addressable memory array; and said control means includes first storage means for temporarily storing a first coordinate of said addressable memory array, second storage means for temporarily storing a second coordinate of said addressable memory array, third storage means for temporarily storing said raster position codes, and multiplexer means for multiplexing said first coordinate, said second coordinate and said raster position code to said memory means.
Claim 4
Dependent Claim 37 words
A video system according to claim 2. wherein said control means further includes: refresh circuit means for refreshing the memory means. said refresh circuit means being connected to said multiplexer means for connection to said memory means.
Claim 5
Dependent Claim 42 words
A video system according to claim 2, wherein: said memory means further includes a multiport dymanic randon access memory; and said control means further includes a cathode ray tube control means for controlling the display of processed data by said display means.
Claim 6
Dependent Claim 164 words
A video system according to claim 1, wherein: said video system further includes a register means connected to said processor means having a plurality of registers for tempararily storing processed data; said memory means is divided into a plurality of memory planes addressable by a row address; and said control means further includes a row address override circuit including a pluarlity of output logic circuits for providing a write enable signal to a memory plane of said memory means, each memory plane connected to a corresponding output logic circuit, a select means connected to said register means For selecting the register of said register means which stores the data to be writtern into the memory plane. a decode means for decoding data from said processor means for selecting the output logic circuit for providing the write enable signal, and an override means for providing a write enable signal to a predetermined number or memory planes simultaneously by a predetermined number of output logic circuits.
Claim 7
Dependent Claim 42 words
A video system according to claim 1, wherein: said memory means includes a memory for storing data therein according to X and Y address coordinates; said controller means includes address means For p rovinding X and Y coordinates to said memory means.
Claim 8
Dependent Claim 42 words
A video system according to claim 6, wherein said address means includes: a first register means for storing said X and Y coordinates from the processor means; and a second register means for storing an offset between said X and Y coordinates.
Claim 9
Dependent Claim 26 words
A video system according to claim 7, wherein said address means further includes means for updating said first register to change said X and Y coordinates.
Claim 10
Dependent Claim 79 words
A video system according to claim 1, wherein said control means includes: first interface means for synchronously interfacing said control means to said display means; second interface means for synchronously interfacing said control means to said processing means; first clock means connected to provide timing to said first interfacing means which is in synchronism with said display means; and second clock means connected to provide timing to said second interfacing means which is in synchronism with said processing means.
Claim 11
Dependent Claim 74 words
A video system according to claim 9, wherein: said display means includes a raster scan cathode ray tube; said first interface means includes a blanking means for providing a blanking signal to said display means during a blanking interval of the raster scan of said display means, and a first request means for requesting the transfer of data from said memory means to said display means during said blanking signal for updating said display.
Claim 12
Dependent Claim 31 words
A video system according to claim 10. wherein said second interface means includes: a second request means for requesting the transfer of data from said memory means to said processing system.
Claim 13
Dependent Claim 31 words
A video system according to claim 11, wherein said control means further includes an arbiter means for arbitrating priority between requests from said first request means and said second request means.
Claim 14
Dependent Claim 100 words
A video,system comprising: a processor means for processing data; a memory means connected to said processor means for storing therein said processed data; a display means for displaying said data; a shift register means connected to said memory means and said display means for shifting data between said memory means and said display means; . a control means connected to said memory means and said shift register means for controlling the transfer of data between said processor means and said memory means, said memory means and said shift register means and from said shift register means to said display means.
Claim 15
Dependent Claim 100 words
A video,system comprising: a processor means for processing data; a memory means connected to said processor means for storing therein said processed data; a display means for displaying said data; a shift register means connected to said memory means and said display means for shifting data between said memory means and said display means; . a control means connected to said memory means and said shift register means for controlling the transfer of data between said processor means and said memory means, said memory means and said shift register means and from said shift register means to said display means.
Claim 16
Dependent Claim 87 words
A video system controller has incorporated therein a state machine which comprises: a plurality of addressable cell means connected in cascade arrangements for converting a plurality of first signals to a single output signal, each addressable cell means comprises a programmable logic array means for providing a predetermined plurality of output signals in response to the first signal applied to address terminals of the programmable logic array; and logic means for logically manipulating in a oredetermined method the plurality of output signals to obtain a state output.
Claim 17
Dependent Claim 87 words
A video system controller has incorporated therein a state machine which comprises: a plurality of addressable cell means connected in cascade arrangements for converting a plurality of first signals to a single output signal, each addressable cell means comprises a programmable logic array means for providing a predetermined plurality of output signals in response to the first signal applied to address terminals of the programmable logic array; and logic means for logically manipulating in a oredetermined method the plurality of output signals to obtain a state output.
Claim 18
Dependent Claim 38 words
The video system controller according to Claim 14 wherein the logic means comprises: a logic gate means for obtaining the NOR combination of the output signals from the programmable logic array to obtain a NOR output state signal.
Claim 19
Dependent Claim 48 words
The video system controller according to Claim 15 further comprising: first means for connecting the state output to a predetermined address terminal; inverting means for inverting the state output to obtain a complement signal; and second means for connecting the complement signal to a second predetermined address terminal.

References Cited (Backward Citations)

US4104624A Cited
US4288706A Cited
US4286320A Cited
US4639890A Cited

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