EP0186818A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Chip to pin interconnect method
Assignee: International Business Machines Corp
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Filing: 1985-12-10
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Granted: —
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Expires: 2005-12-10
Abstract
Abstract A self aligning integrated circuit package including a flexible insulated lead frame (11) and a flip chip (16) having a plurality of input/output solder balls (17) in predetermined positions thereon. The lead frame is provided with a plurality of flexible metallic leads (13) on an insulation coating. A plurality of openings is etched in the insulating coating over the ends of the leads to be connected to the solder balls on the chip. These openings in the insulation are in the same pattern as the balls on the chip and act as a jig to assure that the chip is properly positioned on the lead frame and that the solder balls are contained in a restricted area and provide significant electrical contact to the exposed lead frames.
Inventors
- 👤 Robert Marks
- 👤 Douglas Wallace Phelps, Jr.
- 👤 William Carroll Ward
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 09:56
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/479; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/20
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
139 words
An integrated circuit package for an encapsulated, flip chip (16) having a plurality of vertically extended input/output contacts (17) in predetermined positions mounted thereon, characterized in that these are provided: a plurality of flexible metallic leads (13) disposed on an insulating coating (11), and a plurality of openings in the insulating coating (11) over the ends of the leads (13) to expose the leads to the input/output contacts (17) on the chip, the openings in the insulation (11) being in the same pattern as the contacts (17) on the chip so as to act as a jig to assure that the chip is property positioned and aligned on the leads and that the contacts are contained in the openings to provide electrical contact to the exposed leads, and encapsulation means surrounding the chip and the conductors on the film.
Claim 2
Dependent Claim
139 words
An integrated circuit package for an encapsulated, flip chip (16) having a plurality of vertically extended input/output contacts (17) in predetermined positions mounted thereon, characterized in that these are provided: a plurality of flexible metallic leads (13) disposed on an insulating coating (11), and a plurality of openings in the insulating coating (11) over the ends of the leads (13) to expose the leads to the input/output contacts (17) on the chip, the openings in the insulation (11) being in the same pattern as the contacts (17) on the chip so as to act as a jig to assure that the chip is property positioned and aligned on the leads and that the contacts are contained in the openings to provide electrical contact to the exposed leads, and encapsulation means surrounding the chip and the conductors on the film.
Claim 3
Dependent Claim
29 words
The integrated circuit package of claim 1, characterized in that the leads (13) have a reduced thickness in their part overlying the pattern of holes in the insulating coating.
Claim 4
Dependent Claim
178 words
Method of manufacturing an integrated circuit package for an encapsulated, flip chip (16) having a plurality of vertically extended input/output contacts (17) in predetermined positions mounted thereon, characterized in that it comprises the steps of: forming electrical conductors (13) on the first surface of a film (11) of insulating material, forming a plurality of holes in a predetermined pattern in the insulating material wherein portions of said conductors are exposed through the holes, and placing a semiconductor chip (16) with a plurality of input and output contacts (17), having a pattern identical to that of the formed holes in the insulating material on the film, each contact being in registry with a corresponding hole and extending from the surface of the semiconductor chip to the underlying conductor through the film while the remainder of the semiconductor chip is electrically insulated from the electrical conductors by the insulating film, electrically bonding the contacts (17) of the chip to the electrical conductors (13) in the holes, placing an encapsulation means around the chip and the conductors formed on the film.
Claim 5
Dependent Claim
178 words
Method of manufacturing an integrated circuit package for an encapsulated, flip chip (16) having a plurality of vertically extended input/output contacts (17) in predetermined positions mounted thereon, characterized in that it comprises the steps of: forming electrical conductors (13) on the first surface of a film (11) of insulating material, forming a plurality of holes in a predetermined pattern in the insulating material wherein portions of said conductors are exposed through the holes, and placing a semiconductor chip (16) with a plurality of input and output contacts (17), having a pattern identical to that of the formed holes in the insulating material on the film, each contact being in registry with a corresponding hole and extending from the surface of the semiconductor chip to the underlying conductor through the film while the remainder of the semiconductor chip is electrically insulated from the electrical conductors by the insulating film, electrically bonding the contacts (17) of the chip to the electrical conductors (13) in the holes, placing an encapsulation means around the chip and the conductors formed on the film.
Claim 6
Dependent Claim
61 words
The method of claim 3, wherein the step of forming electrical conductors comprises: - thinning the middle portion of a stripe of conducting material - applying a film of insulating material to the flat bottom surface of the stripe of conducting material - defining the electrical conductors by photolithographic means from the stripe of conducting material, maintaining a selvage portion (10).
Claim 7
Dependent Claim
21 words
The method of claim 4, characterized in that the encapsulation step comprises: - severing the selvage portion from the encapsulated chip.
References Cited (Backward Citations)
No citation records indexed.
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