Improved synchronous/asynchronous modem

Claim 2

A synchronous and asynchronous data transmitter/receiver, characterized by: a first data converter for providing a first serial data signal by converting an outgoing data signal from a parallel data format into an asynchronous serial data format, and for providing an incoming data signal by converting a second serial data signal from said asynchronous serial data format into said parallel data format; a second data converter connected to said first data converter, responsive to a first instruction in said first serial data signal for providing a third serial data signal by leaving said first serial data signal in said asynchronous serial data format, and for providing said second serial data signal by leaving said fourth serial data signal in said asynchronous serial data format, and responsive to a second instruction in said first serial data signal for providing said third serial data signal by converting said first serial data signal from said asynchronous serial data format into a synchronous serial data format, and for providing said second serial data signal by converting said fourth serial data signal from said synchronous serial data format into said asynchronous serial data format; and a modulator/demodulator connected to said second data converter, responsive to said third serial data signal for providing a transmitted data signal by modulating a carrier with said third serial data signal, and responsive to a received data modulated signal for providing said fourth serial data signal by demodulating said received data modulated signal to recover the data, said fourth serial da,a signal being in either said asynchronous serial data format or said synchronous serial data format.

Claim 3

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said first data converter comprises a universal-asynchronous- receiver-transmitter.

Claim 4

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said second data converter comprises a microprocessor.

Claim 5

The synchronous and asynchronous data transmitter/receiver of Claim 3 wherein said second data converter further comprises a multiplexer.

Claim 6

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said modulator/demodulator comprises a modem engine.

Claim 7

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said first instruction comprises a data word with an inverted parity bit.

Claim 8

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said first instruction comprises a predetermined character.

Claim 9

The synchronous and asynchronous data transmitter/receiver of Claim 7 wherein said predetermined character is the escape character.

Claim 10

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said second instruction comprises a data word with an inverted parity bit.

Claim 11

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said second instruction comprises a predetermined character.

Claim 12

The synchronous and asynchronous data transmitter/receiver of Claim 1 wherein said predetermined character is the escape character.

Claim 13

A synchronous and asynchronous data transmitter/receiver, characterized by: a data converter, responsive to a first instruction in an outgoing data signal, said outgoing data signal being in an asynchronous serial data format, for providing a first serial data signal by leaving said outgoing data signal in said asynchronous serial data format and for providing an incoming data signal by leaving a second serial data signal in said asynchronous serial data format, and alternately responsive to a second instruction in said outgoing data signal for providing said first serial data signal by converting said outgoing data signal from said asynchronous serial data format into a synchronous serial data format, and for providing said second serial data signal by converting said second serial data signal from said synchronous serial data format to said asynchronous serial data format, said second serial data signal being in either said asynchronous serial data format or said synchronous serial data format; and a modulator/demodulator connected to said data converter, and responsive to said first serial data signal for providing a transmitted data signal by modulating a carrier with said first serial data signal, and responsive to a received data modulated signal for providing said second serial data signal by demodulating said received data modulated signal to recover the data.

Claim 14

A synchronous and asynchronous data transmitter/receiver, characterized by: a data converter, responsive to a first instruction in an outgoing data signal, said outgoing data signal being in an asynchronous serial data format, for providing a first serial data signal by leaving said outgoing data signal in said asynchronous serial data format and for providing an incoming data signal by leaving a second serial data signal in said asynchronous serial data format, and alternately responsive to a second instruction in said outgoing data signal for providing said first serial data signal by converting said outgoing data signal from said asynchronous serial data format into a synchronous serial data format, and for providing said second serial data signal by converting said second serial data signal from said synchronous serial data format to said asynchronous serial data format, said second serial data signal being in either said asynchronous serial data format or said synchronous serial data format; and a modulator/demodulator connected to said data converter, and responsive to said first serial data signal for providing a transmitted data signal by modulating a carrier with said first serial data signal, and responsive to a received data modulated signal for providing said second serial data signal by demodulating said received data modulated signal to recover the data.

Claim 15

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said modulator/demodulator comprises a modem engine.

Claim 16

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said data converter comprises a microprocessor.

Claim 17

The synchronous and asynchronous data transmitter/receiver of Claim 14 wherein said data converter further comprises a multiplexer.

Claim 18

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said first instruction comprises a data word with an inverted parity bit.

Claim 19

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said first instruction comprises a predetermined character.

Claim 20

The synchronous and asynchronous data transmitter/receiver of Claim 17 wherein said predetermined character is the escape character.

Claim 21

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said second control signal is the inverse of said first control signal.

Claim 22

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said second instruction comprises a data word with an inverted parity bit.

Claim 23

The synchronous and asynchronous data transmitter/receiver of Claim 12 wherein said second instruction comprises a predetermined character.

Claim 24

The synchronous and asynchronous data transmitter/receiver of Claim 21 wherein said predetermined character is the escape character.

Claim 25

A bidirectional serial data format converter for selectably passing a first input data stream and a second input data stream in a first data format or converting said first input data stream and said second input data stream into a second data format, wherein said converter is characterized by: a processor responsive to a first instruction in said first input serial data stream for providing a first control signal, and alternately responsive to a second instruction in said first input serial data stream for providing a second control signal, for providing a first converted data stream by converting said first input data stream from said first data format into said second data format, and for providing a second converted data stream by converting said second input data stream from said first data format into said second data format; and a data selector comprising a first input, a second input connected to said processor, a third input, a fourth input connected to said processor, a control input connected to said processor, a first output, and a second output, and responsive to said first control signal for providing a first output serial data stream in said first data format by passing said first input serial data from said first input to said first output and a second output serial data stream in said first data format by passing said second input data stream from said third input to said second output, and alternately responsive to said second control signal for providing said first output serial data stream in said second data format by passing said first converted data stream from said second input to said first output, and for providing said second output serial data stream in said first data format by passing said second converted data stream from said fourth input to said second output.

Claim 26

A bidirectional serial data format converter for selectably passing a first input data stream and a second input data stream in a first data format or converting said first input data stream and said second input data stream into a second data format, wherein said converter is characterized by: a processor responsive to a first instruction in said first input serial data stream for providing a first control signal, and alternately responsive to a second instruction in said first input serial data stream for providing a second control signal, for providing a first converted data stream by converting said first input data stream from said first data format into said second data format, and for providing a second converted data stream by converting said second input data stream from said first data format into said second data format; and a data selector comprising a first input, a second input connected to said processor, a third input, a fourth input connected to said processor, a control input connected to said processor, a first output, and a second output, and responsive to said first control signal for providing a first output serial data stream in said first data format by passing said first input serial data from said first input to said first output and a second output serial data stream in said first data format by passing said second input data stream from said third input to said second output, and alternately responsive to said second control signal for providing said first output serial data stream in said second data format by passing said first converted data stream from said second input to said first output, and for providing said second output serial data stream in said first data format by passing said second converted data stream from said fourth input to said second output.

Claim 27

The bidirectional serial format converter of Claim 23 wherein said processor comprises a microprocessor.

Claim 28

The bidirectional serial format converter of Claim 23 wherein said data selector comprises a two-channel multiplexer.

Claim 29

The bidirectional serial format converter of Claim 23 wherein said first instruction comprises a data word with an inverted parity bit.

Claim 30

The bidirectional serial format converter of Claim 23 wherein said first instruction comprises a predetermined character.

Claim 31

The bidirectional serial format converter of Claim 27 wherein said predetermined character is the escape character.

Claim 32

The bidirectional serial format converter of Claim 23 wherein said second control signal is the inverse of said first control signal.

Claim 33

The bidirectional serial format converter of Claim 23 wherein said first data format is an asynchronous serial data format.

Claim 34

The bidirectional serial format converter of Claim 23 wherein said second data format is a synchronous serial data format.

Claim 35

The bidirectional serial format converter of Claim 23 wherein said second instruction comprises a data word with an inverted parity bit.

Claim 36

The bidirectional serial format converter of Claim 23 wherein said second instruction comprises a predetermined character.

Claim 37

The bidirectional serial format converter of Claim 33 wherein said predetermined character is the escape character.

Claim 38

The bidirectional serial format converter of Claim 23 wherein said processing means is further responsive to a plurality of instructions for changing the operating parameters of said processor.

Claim 39

The bidirectional serial format converter of Claim 35 wherein said operating parameters comprise the baud rate.

Claim 40

The bidirectional serial format converter of Claim 36 wherein said operating parameters further comprise the parity selected.

Claim 41

In a method of operating a system whereby information data is exchanged between devices by encoding said information data as an information data word, said information data word being characterized by a first predetermined parity, and transferring said information data as a series of data words, said series of data words comprising a plurality of said information data words, a method for exchanging control data between said devices, characterized by: a transmitting procedure characterized by: (a) encoding said control data as a control data word wherein said control data word is characterized by a second predetermined parity; and (b) inserting said control data word into said series of data words; and a receiving procedure characterized by: (c) inspecting the parity of each data word in said series of data words; and (d) processing each said data word having said second predetermined parity as one of said control data words.

Claim 42

In a method of operating a system whereby information data is exchanged between devices by encoding said information data as an information data word, said information data word being characterized by a first predetermined parity, and transferring said information data as a series of data words, said series of data words comprising a plurality of said information data words, a method for exchanging control data between said devices, characterized by: a transmitting procedure characterized by: (a) encoding said control data as a control data word wherein said control data word is characterized by a second predetermined parity; and (b) inserting said control data word into said series of data words; and a receiving procedure characterized by: (c) inspecting the parity of each data word in said series of data words; and (d) processing each said data word having said second predetermined parity as one of said control data words.

Claim 43

In a method of operating a system whereby information data is exchanged between devices by encoding said information data as an information data word and transferring said information data as a series of data words, a method for exchanging control data between said devices, characterized by: a transmitting procedure characterized by: (a) generating a signal word corresponding to a predetermined character; (b) generating a control word corresponding to said control data; and (c) inserting into said series of data words said signal word followed immediately by said control word; and a receiving procedure conducted concurrently with said transmitting procedure, characterized by: (d) inspecting said series of data words for said signal word; (e) processing the data word immediately following a said signal word as a control word.

Claim 44

In a method of operating a system whereby information data is exchanged between devices by encoding said information data as an information data word and transferring said information data as a series of data words, a method for exchanging control data between said devices, characterized by: a transmitting procedure characterized by: (a) generating a signal word corresponding to a predetermined character; (b) generating a control word corresponding to said control data; and (c) inserting into said series of data words said signal word followed immediately by said control word; and a receiving procedure conducted concurrently with said transmitting procedure, characterized by: (d) inspecting said series of data words for said signal word; (e) processing the data word immediately following a said signal word as a control word.

Claim 45

The method of Claim 39 wherein said predetermined character is the escape character.

Claim 46

In a method of operating a system whereby information data is exchanged between devices by encoding said information data as an information data word and transferring said information data as a series of data words, a method for exchanging control data between said devices, characterized by: a transmitting procedure characterized by: (a) generating a signal word corresponding to a predetermined character; (b) generating a control word corresponding to said control data; (c) inserting into said series of data words said signal word immediately followed by said control word; (d) comparing each said information data word with said signal word; and (e) if a said information data word is said signal word, inserting said signal word into said series of data words immediately after said information data word; and a receiving procedure conducted concurrently with said transmitting procedure, characterized by: (f) inspecting said series of data words for said signal word; (g) if a data word in said series is said signal word, comparing the immediately following data word with said signal word; (h) if the immediately following data word is a word other than said signal word, processing said immediately following data word as a control word.

Claim 47

In a method of operating a system whereby information data is exchanged between devices by encoding said information data as an information data word and transferring said information data as a series of data words, a method for exchanging control data between said devices, characterized by: a transmitting procedure characterized by: (a) generating a signal word corresponding to a predetermined character; (b) generating a control word corresponding to said control data; (c) inserting into said series of data words said signal word immediately followed by said control word; (d) comparing each said information data word with said signal word; and (e) if a said information data word is said signal word, inserting said signal word into said series of data words immediately after said information data word; and a receiving procedure conducted concurrently with said transmitting procedure, characterized by: (f) inspecting said series of data words for said signal word; (g) if a data word in said series is said signal word, comparing the immediately following data word with said signal word; (h) if the immediately following data word is a word other than said signal word, processing said immediately following data word as a control word.

Claim 48

The method of Claim 41 wherein said predetermined character is the escape character.

Claim 49

In a method of operating a system comprising a data set and a data terminal, a first port of said data set being connected to a first port on said data terminal, said data set and said data terminal communicating through said first ports by means of an asynchronous serial data interface, said data set also having a second port usable for synchronous communications with an external device, said data set being operable in at least either a synchronous data mode or an asynchronous command mode, a method of using said asynchronous serial data interface to control the mode of said data set and to regulate the flow of data between said data set and said data terminal, characterized by: using the clear-to-send line to indicate that said data set is ready to accept data from said data terminal; using the data-terminal-ready line to cause said data set to exit said synchronous data mode and then enter said asynchronous command mode; using the ready-to-send line, to cause a synchronous data receiver in said data set to enter the hunt state; and using the ring indicator line to advise said data terminal that said data set is sending an end-of-frame sequence from said second port.

Claim 50

In a method of operating a system comprising a data set and a data terminal, a first port of said data set being connected to a first port on said data terminal, said data set and said data terminal communicating through said first ports by means of an asynchronous serial data interface, said data set also having a second port usable for synchronous communications with an external device, said data set being operable in at least either a synchronous data mode or an asynchronous command mode, a method of using said asynchronous serial data interface to control the mode of said data set and to regulate the flow of data between said data set and said data terminal, characterized by: using the clear-to-send line to indicate that said data set is ready to accept data from said data terminal; using the data-terminal-ready line to cause said data set to exit said synchronous data mode and then enter said asynchronous command mode; using the ready-to-send line, to cause a synchronous data receiver in said data set to enter the hunt state; and using the ring indicator line to advise said data terminal that said data set is sending an end-of-frame sequence from said second port.