Memory cartridge and data processing apparatus

Claim 2

A data processing apparatus according to claim 1, characterised in that the conditional information further includes at least one data bit (A14) defining which of the banks are changed according to the change-over conditions.

Claim 3

A data processing apparatus in accordance with claim 1 or 2, wherein said memory control means (26) includes a buffer register (56) in which said data representing bank change-over conditions can be temporarily loaded, and data loading means (58) for selectively loading data in any one of said plurality of registers (62,64,66,68) in response to the content of said buffer register (56).

Claim 4

A data processing apparatus in accordance with any one of the preceding claims, wherein said address generating means (70,72,74) includes a plurality of address generating circuits which respectively output an address for bank change-over for one of said plurality of memory areas in response to the content of at least one of said plurality of registers (62,66,67,68).

Claim 5

A data processing apparatus in accordance with claim 1, characterised in that the second microprocessor comprises a picture processing unit (42) for picture processing, in that the apparatus further includes a video memory (44) which is accessed by said picture processing unit (42), a video monitor for displaying an image on a screen thereof based on data from said picture processing unit (42), and in that said memory control means (26) includes area specifying means (72) for specifying a memory area of said video memory (44) accessible by said picture processing unit (42) based on data from said first microprocessor (34).

Claim 6

A data processing apparatus in accordance with claim 5, wherein an address space for said video memory (44) is equal to a first plurality of screens of said video monitor, and a real address of said video memory (44) is equal to a second plurality of screens less than said first plurality of screens, said area specifying means (72) includes a signal outputting means for outputting a signal (VRAM10) representing that said memory area of said video memory (44) should be assigned in what place of said address space, whereby a vertical scrolling or horizontal scrolling occurs on the screen of said video monitor.

Claim 7

A data processing apparatus in accordance with claim 5, characterised in that said first memory (20) is a program memory (20) for storing a program of a picture processing and said second memory is character memory (22) for storing character data used for said image processing, and said memory control means (26) includes program bank controlling means (74) for generating an address of bank change-over of said program memory (20) based on said data from said first microprocessor (34) and character bank controlling means (70) for generating an address for bank change-over of said character memory (22) based on said data from said first microprocessor (34).

Claim 8

A data processing apparatus according to one of the preceding claims, characterised in that the first memory (20), the second memory and the memory control means (26) are installed on a printed circuit board (14) being connected with the data processing apparatus, wherein the printed circuit board (14) is part of a memory cartridge (10) which is attachable to and detachable from the data processing apparatus and is loaded in the data processing unit when it is used.

Claim 9

A data processing apparatus according to one of the claims 5 to 8, characterised in that the data processing apparatus is included in a game apparatus, wherein a game image is displayed on the screen of the video monitor on the basis of the program data stored in the program memory (20) and the character data stored in the character memory (22).

Claim 10

A data processing apparatus according to any preceding claim characterised in that the apparatus includes an expansion memory (24) separate from the primary memory (20,22) for holding data when the first or second memory is full, and in that the memory control means (26) addresses said expansion memory.

Claim 11

a data processing apparatus according to any of claims 3 to 10 wherein the data loading means (58) load data into the first address generating means (74) and the second generating means at timings different from each other.

Claim 12

A memory cartridge (10) for use in a data processing apparatus (30) which includes a first processor (34) coupled to a first address bus, said memory cartridge (10) comprising a first memory (20) coupled to said first address bus and whose memory area is divided into a plurality of banks, and a memory control means (26) which includes a register for receiving conditional information including data representing bank selection conditions of the first memory (20) output onto a data bus from said first processor (34), the first memory (20) being addressed by first address data output onto the first address bus by the first processor (34), the memory control means (26) further including a first output means (74) for outputting first bank selection data to the first memory (20) for performing bank selection and bank change-over, the memory control means (26) giving an upper portion of an address input for specifying a bank of the first memory (20) characterised in that the memory control means includes a buffer register (56) for temporarily storing first bank selection data output onto the data bus by the first processor (34), in that the data processing apparatus (30) further includes a second processor (42) said memory cartridge (10) includes a second memory (22) coupled to a second address bus for being addressed by a second processor (42), coupled to the second address bus, in that the second memory (22) is divided into a plurality of banks, in that the buffer register (56) temporarily stores bank selection conditions of the second memory (22) output onto the data bus within the conditional information by the first processor (34), in that the memory control means (26) includes a first register (62) provided in correspondence to said first memory for holding said first bank selection data, a second register (68) provided in correspondence to said second memory (22) for holding said second bank selection data, loading means (58,60) for loading said first bank selection data and said second bank selection data into said first register (62,64) and said second register (66,68) respectively at times different from each other on the basis of load control data outputted by said first processor (34), second output means for outputting said second bank selection data held in the second register (68) to said second memory (22) for performing bank selection and bank change-over,and a further register (66) associated with at least one of the first register (62) and the second register (68) whereby a bank of at least one of the said first memory (20) and said second memory (22) can be selected in accordance with size conditions contained within the conditional information stored in the first and in the second registers and being always output from the first microprocessor, which define a size of a bank utilised by the first processor (34).

Claim 13

A memory cartridge according to claim 12, characterised in that one of said first memory and said second memory is a character memory for storing character data by which characters are displayed on a screen of a monitor and the other of them is a program memory for storing program data for controlling at least displayed conditions of said character.