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EP0281101A2
Expired / Lapsed
EP
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Circuit for cancelling whole or part of a waveform using non-recursive and recursive filters
Assignee: NEC Corp
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Filing: 1988-03-02
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Granted: —
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Expires: 2008-03-02
Abstract
Abstract The whole or part of a waveform is cancelled by a circuit comprising a nonrecursive filter (10) and a recursive filter (11,12). The nonrecursive filter (10) has a plurality of first multipliers (17-0 to 17-(N-1)) having first tap weights for modifying symbols successively shifted along a shift register (13-O to 13-N). The recursive filter (11,12) is connected in a series circuit to the shift register and has a second tap weight for recursively modifying the output of the shift register. The recursively modified symbol is modified by a second multiplier (16-O to 16-(N-1)) having a third tap weight and combined in an adder (18) with the symbols modified by the first tap weights to produce a replica of an undesired waveform. The replica is destructively combined in a subtractor (19) with an incoming symbol having an undesired waveform. The output of substractor (19) is utilized to derive the tap weights to adaptively control the inputs to the adder.
Inventors
- 👤 Shin'ichi Koike
- 👤 Masaru Yamaguchi
- 👤 Masanobu Arai
- 👤 Takenori C/O Nec Miyagi Ltd. Ogata
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 07:54
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/20; H04B3/23; H04B3/235; H03; H03H; H03H17/00; H03H17/02; H03H17/0283; H03H17/0286; H03H17/0288; H04B3/238
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
200 words
A circuit for cancelling whole or part of a received waveform, comprising: a nonrecursive filter (10; 110; 210; 310; 410; 510) including a plurality of first delay elements for converting a symbol into a series of symbols spaced apart a unit time interval, a plurality of first multipliers associated respectively with said delay elements for modifying said spaced apart symbols with first tap weights (C i ; Cʹ i ) and an adder for summing outputs of said first multipliers; a recursive filter (11; 111; 211; 311; 411; 511) for recursively modifying an output of said delay elements with a second tap weight (J; Jʹ; a second multiplier (25; 125; 225; 325; 425; 525) for modifying an output of said recursive filter with a third tap weight and applying the modified output of the recursive filter to an input of said adder to cause the adder to produce a replica of whole or part of said waveform; a subtractor (19; 302; 304) for combining said replica with a received symbol having said waveform; and tap weight deriving means for deriving said first and third tap weights (C i , K; Cʹ i , Kʹ) from an output of said subtractor.
Claim 2
Dependent Claim
200 words
A circuit for cancelling whole or part of a received waveform, comprising: a nonrecursive filter (10; 110; 210; 310; 410; 510) including a plurality of first delay elements for converting a symbol into a series of symbols spaced apart a unit time interval, a plurality of first multipliers associated respectively with said delay elements for modifying said spaced apart symbols with first tap weights (C i ; Cʹ i ) and an adder for summing outputs of said first multipliers; a recursive filter (11; 111; 211; 311; 411; 511) for recursively modifying an output of said delay elements with a second tap weight (J; Jʹ; a second multiplier (25; 125; 225; 325; 425; 525) for modifying an output of said recursive filter with a third tap weight and applying the modified output of the recursive filter to an input of said adder to cause the adder to produce a replica of whole or part of said waveform; a subtractor (19; 302; 304) for combining said replica with a received symbol having said waveform; and tap weight deriving means for deriving said first and third tap weights (C i , K; Cʹ i , Kʹ) from an output of said subtractor.
Claim 3
Dependent Claim
51 words
A circuit as claimed in claim 1, wherein said tap weight deriving means comprises a plurality of first modifying means (17, 21; 62, 64) for modifying said spaced apart symbols of said series with the output of said subtractor to derive said first tap weights (C i ; Cʹ i ).
Claim 4
Dependent Claim
84 words
A circuit as claimed in claim 2, wherein each of said first modifying means comprises: a third multiplier (17; 62) for multiplying a respective one of said spaced apart symbols with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier; and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive a respective one of said first tap weights.
Claim 5
Dependent Claim
76 words
A circuit as claimed in any of claims 1 to 3, wherein said tap weight deriving means comprises: a second recursive filter (12; 312) for recursively modifying an output of said second multiplier (25; 325) with said second tap weight (J; Jʹ); and second modifying means (31, 32; 331; 332) for modifying an output of said second recursive filter with the output of said subtractor (19; 302, 304) to derive said second tap weight (J; Jʹ).
Claim 6
Dependent Claim
83 words
A circuit as claimed in claim 4, wherein said second modifying means (31, 32; 331, 332) comprises: a third multiplier (31; 331) for multiplying the output of said second recursive filter with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier; and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive said second tap weight (J; Jʹ).
Claim 7
Dependent Claim
45 words
A circuit as claimed in claim 4 or 5, wherein said tap weight deriving means comprises third modifying means (26, 27; 326, 327) for modifying the output of said recursive filter with the output of said subtractor to derive said third tap weight (K; Kʹ).
Claim 8
Dependent Claim
86 words
A circuit as claimed in claim 6, wherein said third modifying means (26, 27; 326, 327) comprises: a third multiplier (26; 326) for multiplying the output of said recursive filter (11; 311) with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier (26; 326); and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive said third tap weight (K; Kʹ).
Claim 9
Dependent Claim
27 words
A circuit as claimed in any of claims 1 to 7, wherein second tap weight (J; Jʹ) is equal to an attenuation coefficient of a transmission medium.
Claim 10
Dependent Claim
33 words
A circuit as claimed in any of claims 1 to 8, wherein said third tap weight (K; Kʹ) is equal to one (C N-1 ; Cʹ N-1 ) of said first tap weights.
Claim 11
Dependent Claim
87 words
A circuit as claimed in any of claims 1 to 8, wherein said third tap weight (K; Kʹ) is equal to one (C N-1 ; Cʹ N-1 ) of said first tap weights, and said tap weight deriving means comprises: means (50; 550) for determining a ratio between two of said first tap weights, said two of the first tap weights including said one of the first tap weights; and means (51-53; 551-553) for deriving said second tap weight (J; Jʹ) as a function of said ratio.
Claim 12
Dependent Claim
74 words
A circuit as claimed in claim 10, wherein said means for deriving said second tap weight (J; Jʹ) comprises: means (51; 551) for generating a pair of first and second constants as a function of said ratio; means (52; 552) for multiplying said first constant by said ratio; and means (53; 553) for adding said multiplied constant to said second value and applying a sum to said recursive filter as said second tap weight.
Claim 13
Dependent Claim
172 words
An echo canceller comprising: a nonrecursive filter (10; 110; 210) including a plurality of first delay elements for converting a symbol which is applied to a hybrid into a series of symbols spaced apart a unit time interval, a plurality of first multipliers associated respectively with said delay elements for modifying said space apart symbols with first tap weights (C i ) and an adder for summing outputs of said first multipliers; a recursive filter (11; 111; 211) for recursively modifying an output of said delay elements with a second tap weight (J); a second multiplier (25; 125; 225) for modifying an output of said recursive filter with a third tap weight and applying an output of the second multiplier to an input of said adder to cause the adder to produce a replica of a symbol transcoupled through said hybrid; a subtractor (19) for destructively combining said replica with said symbol from said hybrid; and tap weight deriving means for deriving said first and third tap weights (C i , K).
Claim 14
Dependent Claim
172 words
An echo canceller comprising: a nonrecursive filter (10; 110; 210) including a plurality of first delay elements for converting a symbol which is applied to a hybrid into a series of symbols spaced apart a unit time interval, a plurality of first multipliers associated respectively with said delay elements for modifying said space apart symbols with first tap weights (C i ) and an adder for summing outputs of said first multipliers; a recursive filter (11; 111; 211) for recursively modifying an output of said delay elements with a second tap weight (J); a second multiplier (25; 125; 225) for modifying an output of said recursive filter with a third tap weight and applying an output of the second multiplier to an input of said adder to cause the adder to produce a replica of a symbol transcoupled through said hybrid; a subtractor (19) for destructively combining said replica with said symbol from said hybrid; and tap weight deriving means for deriving said first and third tap weights (C i , K).
Claim 15
Dependent Claim
47 words
An echo canceller as claimed in claim 12, wherein said tap weight deriving means comprises a plurality of first modifying means (17, 21) for modifying said spaced apart symbols of said series with the output of said subtractor to derive said first tap weights (C i ).
Claim 16
Dependent Claim
84 words
An echo canceller as claimed in claim 13, wherein each of said first modifying means comprises: a third multiplier (17) for multiplying a respective one of said spaced apart symbols with the output of said subtractor: a second adder (41) having a first input connected to an output of said third multiplier; and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive a respective one of said first tap weights.
Claim 17
Dependent Claim
69 words
An echo canceller as claimed in any of claims 12 to 14, wherein said tap weight deriving means comprises: a second recursive filter (12) for recursively modifying an output of said second multiplier (25) with said second tap weight (J); and second modifying means (31, 32) for modifying an output of said second recursive filter with the output of said subtractor (19) to derive said second tap weight (J).
Claim 18
Dependent Claim
80 words
An echo canceller as claimed in claim 15, wherein said second modifying means (31, 32) comprises: a third multiplier (31) for multiplying the output of said second recursive filter with the output of said subtractor; a second adder (41), having a first input connected to an output of said third multiplier; and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive said second tap weight (J).
Claim 19
Dependent Claim
43 words
An echo canceller as claimed in claim 15 or 16, wherein said tap weight deriving means comprises third modifying means (26, 27) for modifying the output of said recursive filter with the output of said subtractor to derive said third tap weight (K).
Claim 20
Dependent Claim
81 words
An echo canceller as claimed in claim 17, wherein said third modifying means (26, 27) comprises: a third multiplier (26) for multiplying the output of said recursive filter (11) with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier (26); and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive said third tap weight (K).
Claim 21
Dependent Claim
27 words
An echo canceller as claimed in any of claims 12 to 18, wherein second tap weight (J) is equal to an attenuation coefficient of a transmission medium.
Claim 22
Dependent Claim
30 words
An echo canceller as claimed in any of claims 12 to 19, wherein said third tap weight (K) is equal to one (C N-1 ) of said first tap weights.
Claim 23
Dependent Claim
81 words
An echo canceller as claimed in any of claims 12 to 19, wherein said third tap weight (K) is equal to one (C N-1 ) of said first tap weights, and said tap weight deriving means comprises: means (5) for determining a ratio between two of said first tap weights, said two of the first tap weights including said one of the first tap weights; and means (51-53) for deriving said second tap weight (J) as a function of said ratio.
Claim 24
Dependent Claim
71 words
An echo canceller as claimed in claim 21, wherein said means for deriving said second tap weight (J) comprises: means (51) for generating a pair of first and second constants as a function of said ratio; means (52) for multiplying said first constant by said ratio; and means (53) for adding said multiplied constant to said second value and applying a sum to said recursive filter as said second tap weight.
Claim 25
Dependent Claim
192 words
A decision feedback equalizer, comprising: a decision circuit (303); a nonrecursive filter (310; 410; 510) including a plurality of delay elements for converting a symbol from said decision circuit into a series of symbols spaced apart a unit time interval, a plurality of first multipliers associated respectively with said delay elements for modifying said spaced apart symbols with first tap weights (Cʹ i ) and an adder for summing outputs of said first multipliers; a recursvie filter (311; 411; 511) for recursively modifying an output of said delay elements with a second tap weight (Jʹ); a second multiplier (325; 425; 525) for modifying an output of said recursive filter with a third tap weight and applying an output of the second multiplier to an input of said adder to cause the adder to produce a replica of an intersymbol interference; a subtractor (302, 304) for combining said replica with a received symbol having said intersymbol interference and applying an output signal of the subtractor to said decision circuit (303); and tap weight deriving means for deriving said first and third tap weights (Cʹ i , Kʹ) from an output of said subtractor.
Claim 26
Dependent Claim
192 words
A decision feedback equalizer, comprising: a decision circuit (303); a nonrecursive filter (310; 410; 510) including a plurality of delay elements for converting a symbol from said decision circuit into a series of symbols spaced apart a unit time interval, a plurality of first multipliers associated respectively with said delay elements for modifying said spaced apart symbols with first tap weights (Cʹ i ) and an adder for summing outputs of said first multipliers; a recursvie filter (311; 411; 511) for recursively modifying an output of said delay elements with a second tap weight (Jʹ); a second multiplier (325; 425; 525) for modifying an output of said recursive filter with a third tap weight and applying an output of the second multiplier to an input of said adder to cause the adder to produce a replica of an intersymbol interference; a subtractor (302, 304) for combining said replica with a received symbol having said intersymbol interference and applying an output signal of the subtractor to said decision circuit (303); and tap weight deriving means for deriving said first and third tap weights (Cʹ i , Kʹ) from an output of said subtractor.
Claim 27
Dependent Claim
48 words
A decision feedback equalizer as claimed in claim 23, wherein said tap weight deriving means comprises a plurality of first modifying means (62, 64) for modifying said spaced apart symbols of said series with the output of said subtractor to derive said first tap weights (Cʹ i ).
Claim 28
Dependent Claim
85 words
A decision feedback equalizer as claimed in claim 24, wherein each of said first modifying means comprises: a third multiplier (62) for multiplying a respective one of said spaced apart symbols with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier; and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive a respective one of said first tap weights.
Claim 29
Dependent Claim
71 words
A decision feedback equalizer as claimed in any of claims 23 to 25, wherein said tap weight deriving means comprises: a second recursive filter (312) for recursively modifying an output of said second multiplier (325) with said second tap weight (Jʹ); and second modifying means (331, 332) for modifying an output of said second recursive filter with the output of said subtractor (302, 304) to derive said second tap weight (Jʹ).
Claim 30
Dependent Claim
81 words
A decision feedback equalizer as claimed in claim 26, wherein said second modifying means (331, 332) comprises: a third multiplier (331) for multiplying the output of said second recursive filter with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier; and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive said second tap weight (Jʹ).
Claim 31
Dependent Claim
44 words
A decision feedback equalizer as claimed in claim 26 or 27, wherein said tap weight deriving means comprises third modifying means (326, 327) for modifying the output of said recursive filter with the output of said subtractor to derive said third tap weight (Kʹ).
Claim 32
Dependent Claim
82 words
A decision feedback equalizer as claimed in claim 28, wherein said third modifying means (326, 327) comprises: a third multiplier (325) for multiplying the output of said recursive filter (311) with the output of said subtractor; a second adder (41) having a first input connected to an output of said third multiplier (326); and a second delay element (42) connected between an output of said second adder and a second input of said second adder to derive said third tap weight (Kʹ).
Claim 33
Dependent Claim
28 words
A decision feedback equalizer as claimed in any of claims 23 to 29, wherein second tap weight (Jʹ) is equal to an attenuation coefficient of a transmission medium.
Claim 34
Dependent Claim
31 words
A decision feedback equalizer as claimed in any of claims 23 to 30, wherein said third tap weight (Kʹ) is equal to one (Cʹ N-1 ) of said first tap weights.
Claim 35
Dependent Claim
82 words
A decision feedback equalizer as claimed in any of claims 23 to 30, wherein said third tap weight (Kʹ) is equal to one (Cʹ N-1 ) of said first tap weights, and said tap weight deriving means comprises: means (550) for determining a ratio between two of said first tap weights, said two of the first tap weights including said one of the first tap weights; and means (551-553) for deriving said second tap weight (Jʹ) as a function of said ratio.
Claim 36
Dependent Claim
72 words
A decision feedback equalizer as claimed in claim 32, wherein said means for deriving said second tap weight (Jʹ) comprises: means (551) for generating a pair of first and second constants as a function of said ratio; means (552) for multiplying said first constant by said ratio; and means (553) for adding said multiplied constant to said second value and applying a sum to said recursive filter as said second tap weight.
References Cited (Backward Citations)
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