EP0317170A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Interprocessor switching network
Assignee: Alcatel Lucent Holdings Inc
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Filing: 1988-11-10
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Granted: —
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Expires: 2008-11-10
Abstract
Abstract A message transport network (10) is provided for high speed switching between processing elements (72, 80). Clusters of low speed processing elements (72) may be connected to the message transport network (10) through a transport node controller (78). The transport node controller (78) and the high speed processors (80) are connected to the gateways (82). A pair of gateways (82) may be connected through a transport interchange node (106) to allow communication between processors (72, 80) associated with the gateways (82). A transport interchange supervisor (98) maintains a record of the status of each gateway (82) and generates commands to form connection between gateways (82) in the transport interchange node (106). A maintenance controller (102) and system maintenance processor (76) oversee the validity of the data being passed through the system on paths independent of the data transfer paths. The message transport network (10) may be used in a variety of applications, such as a telephony switch (11), a signaling transfer point system (21) or a fault tolerant minicomputer (49).
Inventors
- 👤 Edgar Lawrence Read
- 👤 Elwyn Everett Grant
- 👤 Gary Alan Keto
- 👤 Sharlene Chieh-Hsia Lin
- 👤 James Douglas Morgan
- 👤 Robert Earl Nimon
- 👤 Oliver Gene Oldham
- 👤 Allen Ray Adams, Jr.
- 👤 Jose Aurelio Salmones
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 13:26
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0407; G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/16; G06F11/1608; G06F11/1625; G06F11/20; G06F11/2002; G06F11/2007; H04L; H04L49/00; H04L49/20; H04L49/25; H04L49/253; H04L49/55; H04L49/552; G06F11/1604; G06F11/202; G06F11/22; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5625; H04L2012/5627
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
114 words
A switching network for providing connections between processing elements comprising: interface means for transferring information to and from respective processing nodes to which one or more of the processing elements is operably attached; request distributor means operably connected to said interface means for transferring a request for communication from an initiating processing element to a selected processing element; supervisor means determining whether one of said interface means associated with either said initiating processing element or said selected processing element is currently operable to transfer information between said initiating and selected processor; and matrix means for establishing a connection between said initiating and selected processors in response to an appropriate signal from said supervisor means.
Claim 2
Dependent Claim
114 words
A switching network for providing connections between processing elements comprising: interface means for transferring information to and from respective processing nodes to which one or more of the processing elements is operably attached; request distributor means operably connected to said interface means for transferring a request for communication from an initiating processing element to a selected processing element; supervisor means determining whether one of said interface means associated with either said initiating processing element or said selected processing element is currently operable to transfer information between said initiating and selected processor; and matrix means for establishing a connection between said initiating and selected processors in response to an appropriate signal from said supervisor means.
Claim 3
Dependent Claim
39 words
The switching network of Claim 1 and further comprising information control means for connecting a plurality of the processing elements to a single processing node to provide communication between said plurality of processing elements and a single interface means.
Claim 4
Dependent Claim
39 words
The switching network of Claim 2 wherein said information control means include means to poll said plurality of processing elements to determine whether a request for connection is present and transfers said request for connection to said interface means.
Claim 5
Dependent Claim
26 words
The switching network of Claim 1 and further comprising group control means for transferring information between a plurality of interface means and said request distributor means.
Claim 6
Dependent Claim
27 words
The switching network of Claim 4 wherein said group control means is further operable to transfer information between a plurality of interface means and said supervisor means.
Claim 7
Dependent Claim
24 words
The switching network of Claim 1 and further comprising maintenance means for monitoring the integrity of the information being transferred through the switching network.
Claim 8
Dependent Claim
24 words
The switching network of Claim 6 wherein said maintenance includes means to check parity flags associated with the information transferred through the switching network.
Claim 9
Dependent Claim
19 words
The switching network of Claim 1 and further comprising means for tracing selected information transferred through the switching network.
Claim 10
Dependent Claim
27 words
The switching network of Claim 1 and further comprising clock means for generating timing signals to said interface means, request distributor means, matrix means and supervisor means.
Claim 11
Dependent Claim
62 words
The switching network of Claim 9 wherein said timing means includes first timing means for generating timing signals to said matrix means and second timing means associated with said matrix means for generating timing signals to said interface means, such that the skew between timing signals used by said matrix means and the timing signals used by said interface means is minimized.
Claim 12
Dependent Claim
184 words
A switching network for providing simultaneous connection between pairs of processors comprising: a plurality of interface means each associated with one or more processors; path request means associated with said interface means for determining whether a first processor connected to first interface means has requested formation of a communication path with a second processor; means for determining the address of the interface means associated with said second processor; means for determining the status of said first interface means and of said interface means associated with said second processor to determine whether a connection between said first and second processor can be currently formed; means for storing said request for a communication path for later execution if the status of either interface means is such that a communication path cannot be currently formed; matrix means for forming a path between said first interface means and said interface means associated with said second processor; and means for assigning an idle status to said first interface means and said interface means associated with said second processor after the termination of communication between said first and second processors.
Claim 13
Dependent Claim
184 words
A switching network for providing simultaneous connection between pairs of processors comprising: a plurality of interface means each associated with one or more processors; path request means associated with said interface means for determining whether a first processor connected to first interface means has requested formation of a communication path with a second processor; means for determining the address of the interface means associated with said second processor; means for determining the status of said first interface means and of said interface means associated with said second processor to determine whether a connection between said first and second processor can be currently formed; means for storing said request for a communication path for later execution if the status of either interface means is such that a communication path cannot be currently formed; matrix means for forming a path between said first interface means and said interface means associated with said second processor; and means for assigning an idle status to said first interface means and said interface means associated with said second processor after the termination of communication between said first and second processors.
Claim 14
Dependent Claim
31 words
The switching network of Claim 11 and further comprising means for signaling the interface means associated with said second processor to indicate that said first processor has requested a path thereto.
Claim 15
Dependent Claim
31 words
The switching network of Claim 11 and further comprising means for signaling the first interface means and the interface means associated with said second processor when a connection has been formed.
Claim 16
Dependent Claim
24 words
The switching network of Claim 11 wherein said path request means includes means for determining priority between simultaneous requests by a plurality of processors.
Claim 17
Dependent Claim
35 words
The switching network of Claim 14 wherein said means for determining priority includes means for rotating priority, such that a processor receiving highest priority on a first cycle receives lowest priority on a subsequent cycle.
Claim 18
Dependent Claim
22 words
The switching network of Claim 11 and further comprising means for transferring requests for path formation to said means for determining status.
Claim 19
Dependent Claim
36 words
The switching network of Claim 16 wherein said means for transferring is connected to a plurality of said path request means and further comprising means for assigning priority for simultaneous requests from said path request means.
Claim 20
Dependent Claim
22 words
The switching network of Claim 11 and further comprising means for monitoring the validity of the data path through the switching network.
Claim 21
Dependent Claim
38 words
The switching network of Claim 18 and further comprising: data buses for transferring data between said matrix means and said interface means; and maintenance buses independent of said data buses for transferring maintenance information to said maintenance means.
Claim 22
Dependent Claim
22 words
The switching network of Claim 11 and further comprising multiplexing means for connecting a plurality of processors to a single interface means.
Claim 23
Independent Claim
128 words
A method for providing connections between processing elements comprising: determining whether a first processor connected to a first interface has requested a communication path to be formed with a second processor; determining the address of said second processor to which said first processor desires communication; storing said request for communication in a memory for later execution if a path cannot currently be formed between said first and second processors; forming a path between the interfaces associated with said first and second processors if neither interface is currently busy; assigning a busy status to said first and second interfaces; transmitting data between said first and second processors; and assigning an idle status to said first and second interfaces after the communication between said first and second processor has completed.
Claim 24
Independent Claim
128 words
A method for providing connections between processing elements comprising: determining whether a first processor connected to a first interface has requested a communication path to be formed with a second processor; determining the address of said second processor to which said first processor desires communication; storing said request for communication in a memory for later execution if a path cannot currently be formed between said first and second processors; forming a path between the interfaces associated with said first and second processors if neither interface is currently busy; assigning a busy status to said first and second interfaces; transmitting data between said first and second processors; and assigning an idle status to said first and second interfaces after the communication between said first and second processor has completed.
Claim 25
Dependent Claim
30 words
The method of Claim 21 and further comprising the step of signaling the interface means associated with said second processor to indicate that said first processor has request a path.
Claim 26
Dependent Claim
31 words
The method of Claim 21 and further comprising the steps of signaling the first interface means and the interface means associated with said second processor when a connection has been formed.
Claim 27
Dependent Claim
22 words
The method of Claim 21 and further comprising the step determining priority between simultaneous requests for connections by a plurality of processors.
Claim 28
Dependent Claim
32 words
The method of Claim 24 and further comprising the step of rotating priority such that a processor receiving highest priority on a first cycle receives the lowest priority on a subsequent cycle.
Claim 29
Dependent Claim
31 words
The method of Claim 21 and further comprising the step of transferring signals from a plurality of interfaces to an associated group control means and prioritizing simultaneous requests from said interfaces.
Claim 30
Dependent Claim
19 words
The method of Claim 21 and further comprising the step of monitoring the validity of data transferred between processors.
Claim 31
Dependent Claim
18 words
The method of Claim 27 and further comprising the step of transferring maintenance information independently of data information.
Claim 32
Dependent Claim
25 words
The method of Claim 21 and further comprising the step of maintaining a table of the status of each interface in a random access memory.
References Cited (Backward Citations)
No citation records indexed.
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