Semiconductor package

Claim 1

A semiconductor package comprising: a ceramic base substrate (6) having an inner and an outer surface on which inner surface a semiconductor device (1) is mounted, and wiring layers (10) provided on the ceramic base substrate, said wiring layers having electrodes; a ceramic cap substrate (8) for sealing said semiconductor device (1) and the wiring layers (10) so as to be protected from the open air; terminals (5) for outer connection provided on the outer surface of said ceramic cap substrate (8); electrodes (11) provided on the inner surface of said ceramic cap substrate (8), which are electrically connected with said terminals (5) for outer connection via vertical through-hole connection layers (4) in the cap substrate (8); and conductive members for connecting electrodes of said wiring layers (10) with said electrodes (11) provided on the inner surface of said cap substrate (8), characterized in that said wiring layers (10) are formed fully on the inner surface of the base substrate (6), a package sealing solder layer (7) is provided between the base substrate (6) and the cap substrate (8) for bonding them at their peripheral portions and for sealing the inner surfaces of the base and cap from the open air, the conductive members consist of solder bumps (12), and the respective electrodes of the base and the cap substrates (6, 8) coincide vertically.