EP0337458A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Apparatus for synthesizing analog signals in PCM
Assignee: Namco Ltd
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Filing: 1989-04-13
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Granted: —
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Expires: 2009-04-13
Abstract
Abstract The present invention provides an analog signal synthesizing apparatus including a waveform memory for storing a plurality of analog signals as PCM data sampled with different sampling frequencies, the amount of PCM data corresponding to plural channels being read from the waveform memory and used to synthesize the analog signals. The analog signal synthesizing apparatus includes an oversampling device for shifting the sampling frequency of said PCM data read from said waveform memory for each channel toward the side of high frequency; a summing device for summing the oversampled PCM data for the respective channel; a D/A converter for converting the summed data into an analog signal; and a low-pass filter for setting a cut-off frequency based on the sampling frequency shifted to the side of high frequency and for eliminating aliasing noises included in the PCM data from the synthesized analog signal. The elimination of the aliasing noise included in the PCM data for each channel is carried out at the common low-pass filter.
Inventors
- 👤 Toru Ogawa
- 👤 Seiichi Sato
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 11:37
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; G; G10; G10H; G10H7/00; G10H2250/00; G10H2250/131; G10H2250/165; G10H2250/195; G10H2250/541; G10H2250/545; Y; Y10; Y10S; Y10S84/00; Y10S84/09
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
169 words
An apparatus for synthesizing analog signals in PCM, said PCM comprising waveform memory adapted to store a plurality of analog signals as PCM data sampled with different sampling frequencies, the portion of said PCM data corresponding to plural channels being read from said waveform memory and used to synthesize the analog signals, said apparatus being characterized in that it comprises: oversampling means for shifting the sampling frequency of said PCM data read from said waveform memory for each channel to the side of high frequency; means for summing said oversampled PCM data for the respective channel; D/A converting means for converting the summed data into an analog signal; and a low-pass filter for setting a cut-off frequency based on the sampling frequencies shifted to the side of high frequency and for eliminating any aliasing noises included in the PCM data from the synthesized analog signal; whereby the elimination of the aliasing noise included in the PCM data for each channel can be carried out at the common low-pass filter.
Claim 2
Independent Claim
169 words
An apparatus for synthesizing analog signals in PCM, said PCM comprising waveform memory adapted to store a plurality of analog signals as PCM data sampled with different sampling frequencies, the portion of said PCM data corresponding to plural channels being read from said waveform memory and used to synthesize the analog signals, said apparatus being characterized in that it comprises: oversampling means for shifting the sampling frequency of said PCM data read from said waveform memory for each channel to the side of high frequency; means for summing said oversampled PCM data for the respective channel; D/A converting means for converting the summed data into an analog signal; and a low-pass filter for setting a cut-off frequency based on the sampling frequencies shifted to the side of high frequency and for eliminating any aliasing noises included in the PCM data from the synthesized analog signal; whereby the elimination of the aliasing noise included in the PCM data for each channel can be carried out at the common low-pass filter.
Claim 3
Dependent Claim
128 words
An apparatus as defined in claim 1, further comprising: a work memory including a plurality of channel areas in each of which the data for each channel are stored; a CPU for performing a computation synthesizing the analog signals in accordance with a predetermined operational program and writing the output data of each channel into the corresponding channel area in said work memory, said CPU being further adapted to compute and output data required to read the PCM data from said waveform memory for each channel; and a control circuit for reading the PCM data from said waveform memory for each channel and inputting them into said oversampling means, based on the data computed by and outputted from said CPU and the data written in said work memory.
Claim 4
Dependent Claim
48 words
An apparatus as defined in claim 2 wherein said control circuit is adapted to sequentially output PCM data reading address for each channel toward said waveform memory in a time sharing manner and to sequentially read PCM data addressed by each of the reading addresses for each channel.
Claim 5
Dependent Claim
78 words
An apparatus as defined in claim 3 wherein said control circuit is adapted to increment the PCM reading address for any channel at a shortened time interval when it is desired to set a higher interval of said channel and to increment the PCM reading address at a prolonged time interval when it is desired to set a lower interval in said channel, whereby the musical interval of the PCM data read for said channel can be controlled.
Claim 6
Dependent Claim
53 words
An apparatus as defined in claim 4 wherein said waveform memory is adapted to store the PCM data which exceed the number of the channels used and wherein said control circuit is adapted to read said PCM data from the channels in any combination and then to input them into said oversampling means.
Claim 7
Dependent Claim
51 words
An apparatus as defined in claim 1 wherein said oversampling means is adapted to N-order interpolate the PCM data read from said waveform memory for each channel (where N is an integer) and to shift the sampling frequency of the PCM data for each channel into the side of high frequency.
Claim 8
Dependent Claim
50 words
An apparatus as defined in claim 1 wherein said oversampling means is adapted to interpolate the PCM data read from said waveform memory for each channel using the Lagrange's interpolation formula and to shift the sampling frequency of said PCM data for each channel into the side of high frequency.
Claim 9
Dependent Claim
50 words
An apparatus as defined in claim 1 wherein said oversampling means is adapted to interpolate the PCM data read from said waveform memory for each channel in a digital filtering manner and to shift the sampling frequency of said PCM data for each channel into the side of high frequency.
Claim 10
Dependent Claim
140 words
An apparatus as defined in claim 6 wherein said oversampling means is adapted to compute the PCM data read from said waveform memory in the order of H n-1 , H n .... so as to obtain the m-th interpolated data H (where m is an integer representative of 0, 1 ...) between H n-1 and H n by the following equation: H = H n-1 + Δ h = H n-1 + ( Δ H/ΔT) mΔt = H n-1 + (H n - H n-1 ) mΔt/ΔT (1) but Δ T=T n -T n-1 , where T n-1 , T n ... represent times at which each of the PCM data is read and Δ t is a time interval for each of the interpolated data, whereby the PCM data for each of said channels can be N-order interpolated.
Claim 11
Dependent Claim
150 words
An apparatus as define in claim 9 wherein said oversampling means comprises: a latch circuit for holding and outputting the PCM data H n-1 inputted thereinto from said waveform memory; a subtractor for computing and outputting Δ H=H n -H n-1 from the PCM data H n newly inputted from said waveform memory and the previous PCM data H n-1 outputted from said latch means; a frequency data memory for receiving an initial value (Δ t/Δ T) of the frequency data representative of the musical interval of the PCM data; a frequency data adder for computing m(Δt/ΔT) using said initial value in said frequency data memory; a multiplier for computing Δh=(ΔH/ΔT) mΔT, based on input data from said adder and frequency data memory; and an another adder for computing and outputting the interpolated data H obtained from said equation (1), based on input data from said multiplier and latch circuit.
Claim 12
Dependent Claim
50 words
An apparatus as defined in claim 2 wherein said waveform memory is adapted to store PCM data which exceed the number of channels used and wherein said control circuit is adapted to read said PCM data for each channel in any combination and to input them into said oversampling means.
Claim 13
Dependent Claim
138 words
An apparatus as defined in claim 3 wherein said oversampling means is adapted to compute the PCM data read from said waveform memory in the order of H n-1 , H n .... so as to obtain the m-th interpolated data H (where m is an integer representative of 0, 1 ...) between H n-1 and H n by the following equation: H = H n-1 + Δh = H n-1 + ( ΔH/ΔT) mΔt = H n-1 + (H n - H n-1 ) mΔt/ΔT (1) but Δ T=T n -T n-1 , where T n-1 , T n ... represent times at which each of the PCM data is read and Δ t is a time interval for each of the interpolated data, whereby the PCM data for each of said channels can be N-order interpolated.
Claim 14
Dependent Claim
181 words
An apparatus as defined in claim 12 wherein said control circuit is adapted to output the initial value Δt/ΔT of the frequency data representative of the musical interval of PCM data newly read from said waveform memory and wherein said oversampling means comprises a latch circuit for holding and outputting the PCM data H n-1 inputted thereinto from said waveform memory; a subtractor for computing and outputting H=H n -H n-1 from the PCM data H n newly inputted from said waveform memory and the previous PCM data H n-1 outputted from said latch means; a frequency data memory for receiving an initial value ( Δ t/ΔT) of the frequency data representative of the musical interval of the PCM data; a frequency data adder for computing m(Δ t/ΔT) using said initial value in said frequency data memory; a multiplier for computing Δh=(ΔH/ΔT) mΔT, based on input data from said adder and frequency data memory; and an another adder for computing and outputting the interpolated data H obtained from said equation (1), based on input data from said multiplier and latch circuit.
Claim 15
Dependent Claim
30 words
An apparatus as defined in claim 10 wherein said oversampling means is adapted to repeatedly perform the N-order interpolation of PCM data for each channel in a time sharing manner.
Claim 16
Dependent Claim
55 words
An apparatus as defined in claim 14 wherein said summing means is adapted to sequentially accumulate the computed data outputted from said oversampling means for the respective channels and to output the accumulated value toward said D/A converting means as the computed data for the last channel has been added into the previous accumulated data.
Claim 17
Dependent Claim
148 words
An apparatus as defined in claim 2 wherein said oversampling means comprises right- and left-channel multipliers all of which are provided in the backward stage of said oversampling means and right- and left-channel adding means which are provided in the backward stages of said right- and left-channel multipliers, said control circuit being adapted to output volume data indicating left and right volumes in the read PCM data toward said right- and left-channel multipliers, said right- and left-channel multipliers being adapted to multiply the interpolated data H outputted from said oversampling means by said right- and left-channel volume data, and said right- and left-channel adding means being adapted to sequentially accumulate the computed data sequentially outputted from the corresponding multiplier for the respective channels and to output the accumulated data toward the D/A converting means in the backward stage thereof as the accumulation is completed for the last channel.
Claim 18
Dependent Claim
75 words
An apparatus as defined in claim 16 wherein said low-pass filter means includes right- and left-channel low-pass filters, said right-channel low-pass filter being adapted to eliminate aliasing noises included in the PCM data from the output of said right-channel adding means through said D/A converting means and said left-channel low-pass filter being adapted to eliminate aliasing noises included in the PCM data from the output of said left-channel adding means through said D/A converting means.
Claim 19
Dependent Claim
30 words
An apparatus as defined in claim 13 wherein said oversampling means is adapted to repeatedly perform the N-order interpolation of PCM data for each channel in a time sharing manner.
Claim 20
Dependent Claim
145 words
An apparatus as defined in claim 18, further comprising right- and left-channel multipliers all of which are provided in the backward stage of said oversampling means and right- and left-channel adding means which are provided in the backward stages of said right- and left-channel multipliers, said control circuit being adapted to output volume data indicating left and right volumes in the read PCM data toward said right- and left-channel multipliers, said right- and left-channel multipliers being adapted to multiply the interpolated data H outputted from said oversampling means by said right- and left-channel volume data, and said right- and left-channel adding means being adapted to sequentially accumulate the computed data sequentially outputted from the corresponding multiplier for the respective channels and to output the accumulated data toward the D/A converting means in the backward stage thereof as the accumulation is completed for the last channel.
Claim 21
Dependent Claim
75 words
An apparatus as defined in claim 19 wherein said low-pass filter means includes right- and left-channel low-pass filters, said right-channel low-pass filter being adapted to eliminate aliasing noises included in the PCM data from the output of said right-channel adding means through said D/A converting means and said left-channel low-pass filter being adapted to eliminate aliasing noises included in the PCM data from the output of said left-channel adding means through said D/A converting means.
Claim 22
Dependent Claim
38 words
An apparatus as defined in claim 1 wherein said oversampling means is adapted to shift the PCM data read for each channel toward the side of high frequency while extending the number of bits in said PCM data.
References Cited (Backward Citations)
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