Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
181 words
A microcomputer comprising an electrically erasable and programmable nonvolatile memory, a central processing unit executing a program and issuing a data write request and a data read request to said nonvolatile memory, and a control circuit coupled to said nonvolatile memory and said central processing unit, said control circuit including timer means for counting a time to generate an operation end signal, first means responsive to said data write request for performing a data write process in which data stored in a selected memory cell of said nonvolatile memory is first erased and new data is then written into said selected memory cell, second means responsive to said operation end signal for terminating said data write process, third means responsive to said data read request issued during said data write process for suspending said data write process, for reading out data from a selected memory cell and thereafter for resuming the suspended data write process, and fourth means for suspending a time count operation of said timer means during a period relative to a suspended period of said data write process.
Claim 2
Dependent Claim
181 words
A microcomputer comprising an electrically erasable and programmable nonvolatile memory, a central processing unit executing a program and issuing a data write request and a data read request to said nonvolatile memory, and a control circuit coupled to said nonvolatile memory and said central processing unit, said control circuit including timer means for counting a time to generate an operation end signal, first means responsive to said data write request for performing a data write process in which data stored in a selected memory cell of said nonvolatile memory is first erased and new data is then written into said selected memory cell, second means responsive to said operation end signal for terminating said data write process, third means responsive to said data read request issued during said data write process for suspending said data write process, for reading out data from a selected memory cell and thereafter for resuming the suspended data write process, and fourth means for suspending a time count operation of said timer means during a period relative to a suspended period of said data write process.
Claim 3
Dependent Claim
78 words
The microcomputer as claimed in claim 1, wherein said control circuit further includes booster means for boosting a first voltage to generate a second voltage necessary for said data write process, and said fourth means suspends the time count operation of said timer means during a period corresponding to a sum of a time period required to read data from the selected memory cell and a time period required to boost said first voltage to said second voltage.
Claim 4
Dependent Claim
125 words
An electrically erasable and programmable nonvolatile memory for a microcomputer issuing a data write request and a data read request to said memory, said memory comprising a memory cell array, timer means for generating an end signal when a predetermined time elapses, means responsive to said data write request for performing data erasing and writing operation to a selected memory cell, means responsive to said data read request for suspending said data erasing and writing operating to read out data from a selected memory cell, means for prolonging said predetermined time by a time period relative to a suspended period of said data erasing and writing operation, and means for terminating said data erasing and writing operation when said timer means generates said end signal.
Claim 5
Dependent Claim
125 words
An electrically erasable and programmable nonvolatile memory for a microcomputer issuing a data write request and a data read request to said memory, said memory comprising a memory cell array, timer means for generating an end signal when a predetermined time elapses, means responsive to said data write request for performing data erasing and writing operation to a selected memory cell, means responsive to said data read request for suspending said data erasing and writing operating to read out data from a selected memory cell, means for prolonging said predetermined time by a time period relative to a suspended period of said data erasing and writing operation, and means for terminating said data erasing and writing operation when said timer means generates said end signal.