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EP0409697A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

MOS integrated circuit with adjustable threshold voltage

Assignee: Gemplus SA
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Filing: 1990-07-12
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Granted: —
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Expires: 2010-07-12
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Abstract

Abstract The MOS cell with adjustable threshold voltage is a cell of the memory type, which can be programmed and erased electrically through charge accumulation by the tunnel effect under a floating gate. To obtain a circuit with adjustable threshold voltage, the cell is firstly "programmed" to zero in such a way that all the charges which may have accumulated are cleared, and then "erased" with source earthed, drain taken to the high potential and control gate taken to the potential desired for the threshold voltage VT of the circuit. At the end of this phase the threshold voltage is adjusted. Application in particular to circuits requiring, in MOS technology, precise voltage references, circuit of the detector or analogue-digital convertor type. <IMAGE>

Inventors

  • 👤 Jacek Kowalski

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 04:13
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/56; G11C11/5621; G11C11/5628; G11C11/5635; G11C11/5692; G11C16/00; G11C16/02; G11C16/06; G11C16/10

Claims Analysis

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References Cited (Backward Citations)

US4357685A Cited
US4495602A Cited
US4720816A Cited

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