Motion picture data coding/decoding system having motion vector coding unit and decoding unit

Claim 2

A moving picture data coding/decoding system having a motion image coding unit for coding a motion vector by a predetermined correlative operation between an input image (Q) and reference image (X) and by detecting every block of a predetermined number of pixels, and a motion vector decoding unit for decoding a motion image from a coded signal outputted from the coding unit; wherein the coding unit comprises a plurality of decimated block cutting circuits (24, 26, 28, 30, 32 and 34) for respectively decimating pixels of the input and reference images in several stages, and cutting blocks having necessity of detecting the motion vector; a first motion vector detection circuit (36) for performing the correlative operation of a motion vector detection about the roughest stage blocks cut by the first stage cutting circuit (24 and 30); a second motion vector detection circuit (38 and 40) for detecting a motion vector of the stage by a differential vector on the basis of the motion vector as an initial vector which is detected by the motion vector detection circuit (36 and 38) rougher than the stage; coding circuits (48, 50 and 52) each for coding the motion vector between the input and reference images (Q and X) by the initial vector in the roughest stage block and differential vector of each stage.

Claim 3

A coding/decoding system of claim 1; wherein the coding unit comprises a first frame memory (20) for storing the input image data (Q); a first 1/4 decimated block cutting circuit (24) of the first stage for receiving the stored data of the first frame memory (20); a first 1/2 decimated block cutting circuit (26) of the second stage for receiving the stored data of the first frame memory (20); a first block cutting circuit (28) of the third stage for receiving the stored data of the first frame memory (20); a second frame memory (22) for storing a reference data (X); a second 1/4 decimated block cutting circuit (30) of the first stage for receiving the stored data of the second frame memory (22); a second 1/2 decimated block cutting circuit (32) of the second stage for receiving the stored data of the second frame memory (22); a second block cutting circuit (34) of the third stage for receiving the stored data of the second frame memory (22); a first stage block counter (54) for directing blocks of the first and second 1/4 decimated block cutting circuits (24 and 30), respectively; a first stage motion vector detection circuit (36) for detecting the first motion vector as the roughest stage by performing the correlative operation the input pixel blocks on the basis of both outputs of the first and second 1/4 decimated block cutting circuits (24 and 30); a first stage motion vector memory (42) for storing the first motion vector detected by the first stage motion vector detection circuit (36) and for supplying the first motion vector to the second 1/2 decimated block cutting circuit (32); a second stage block counter (56) for directing blocks of the first and second 1/2 decimated block cutting circuit (26 and 32), respectively; a second stage motion vector detection circuit (38) for detecting a second motion vector by correlative operation of the input pixel blocks on the basis of both outputs of the first and second 1/2 decimated block cutting circuits (26and 32), and for outputting a detected output to the second 1/2 decimated block cutting circuit (32); a second stage motion vector memory (44) for storing the detercted output of the second stage motion vector detection circuit (38); a final stage block counter (58) for respectively directing blocks of the first and second block cutting circuit (28 and 34); a final stage motion vector detection circuit (40) for detecting a final stage motion vector by correlative operation of the pixel blocks of the input and reference images (Q and X) on the basis of both outputs of the first and second block cutting circuits (28 and 34), and for outputting the final motion vector to the second block cutting circuit (34); a final stage motion vector memory (59) for storing the final detected output of the final stage motion vector detection circuit (40); a first coding circuit (48) for coding the output of the first stage motion vector detection circuit (36); a second coding circuit (50) for coding the output of the second stage motion vector detection circuit (38); a final coding circuit (52) for coding the output of the final stage motion vector detection circuit (40); and a multiplexer (60) for multi-composing entire outputs of the first to final stage motion vector detection circuits (36, 38 and 40) and for outputting a composite output to the decoding unit.

Claim 4

A coding/decoding system of claim 1, wherein the motion vector decoding unit comprises a plurality of decoding circuits (72, 73 and 74) constructed by a plurality of stages and for decoding a motion vector between the input and reference images (Q and X) on the basis of an initial vector coded by the coding unit and a differential vector; and a plurality of motion vector memories (75, 76 and 77) constructed by a plurality of stages and for storing each stage motion vector, respectively.

Claim 5

A coding/decoding system of claim 3, wherein the motion vector decoding unit comprises a demultiplexer (70) for distributing again the coded signals composed by the coding unit; a first stage decoding circuit (72) for decoding one of the coded signals by the demultiplexer (70) into the initial vector; a first stage motion vector memory (75) for storing the initial vector decoded by the first stage decoding circuit (72); a second stage decoding circuit (73) for decoding a second stage motion vector on the basis of the coded signal from the demultiplexer (70) and the initial vector read out from the first stage motion vector memory (75); a second motion vector memory (76) for storing the second stage motion vector; a final stage decoding circuit (74) for a final stage motion vector on the basis of the coded signal from the demultiplexer (70) and the second stage motion vector read out from the second stage motion vector memory (76); and a final stage motion vector memory (77) for storing the final stage motion vector.

Claim 6

A coding/decoding system of claim 1, wherein the second stage decoding circuit (73) comprises means for decoding by the variable length code when the input code is a code without a predetermined code, means for adding a previously decoded differential vector as a shifted amount with the second stage motion vector which is a double vector by multiplying the initial vector read out from the first stage motion vector memory (75) in both the horizontal and vertical directions, means for decoding a successive code of the input code by the variable length code when the input code is the predetermined code, and means for adding a double vector which is multiplied in both the horizontal and vertical directions from the first stage motion vector corresponding to the predetermined code with the variable length decoded vector, thereby performing the second stage decoding.

Claim 7

A coding/decoding system of claim 4, wherein the final stage decoding circuit (74) comprises means for decoding by the variable length code when the input code is a code without a predetermined code, means for adding a previously decoded differential vector as shifted amount with the final stage motion vector which is a double vector by multiplying the second stage motion vector read out from the second stage motion vector memory (76) in both the horizontal and vertical directions, means for decoding a successive code of the input code by the variable length code when the input code is the predetermined code, and means for adding a double vector which is multiplied in both the horizontal and vertical directions from the second stage motion vector corresponding to the predetermined code with the variable length decoded vector, thereby performing the final stage decoding.