EP0426282A2
Expired / Lapsed
EP
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Three transistor EEPROM cell
Assignee: STMicroelectronics lnc USA
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Filing: 1990-08-30
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Granted: —
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Expires: 2010-08-30
Abstract
Abstract An EEPROM cell suitable for use in programmable logic devices contains three transistors. A floating gate transistor is used to retain a programmed value using charge storage on the floating gate. A read transistor is connected between the floating gate transistor and an output signal line, and used to access the value stored in the floating gate transistor. A write transistor is connected to the floating gate transistor opposite the read transistor, and is used when programming the floating gate transistor. The write transistor and its associated control circuitry are fabricated to handle the higher programming voltages required by the floating gate device. The read transistor and associated drive circuitry are not required to handle the higher programming voltages, and can be fabricated using smaller, faster devices.
Inventors
- 👤 Bruce Andrew Doyle
- 👤 Randy Charles Steele
- 👤 Safoin Assaf Raad
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 20:12
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0433; H; H10; H10B; H10B69/00
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
102 words
An erasable non-volatile storage cell, comprising: a select transistor connected to an output signal line and having a control input; a floating gate transistor connected to said select transistor, wherein operation of said floating gate transistor is controlled by charge stored on a charge storage node; and a programming transistor connected to said floating gate transistor and to a supply voltage, and having a control input; wherein the cell is programmed by transferring charge between the charge storage node and the supply voltage through said programming transistor, and wherein the cell is read by applying a control signal to said select transistor.
Claim 2
Dependent Claim
102 words
An erasable non-volatile storage cell, comprising: a select transistor connected to an output signal line and having a control input; a floating gate transistor connected to said select transistor, wherein operation of said floating gate transistor is controlled by charge stored on a charge storage node; and a programming transistor connected to said floating gate transistor and to a supply voltage, and having a control input; wherein the cell is programmed by transferring charge between the charge storage node and the supply voltage through said programming transistor, and wherein the cell is read by applying a control signal to said select transistor.
Claim 3
Dependent Claim
31 words
The cell of Claim 1, wherein the supply voltage is raised to a programming voltage level to store charge onto the charge storage node, and remains at a ground potential otherwise.
Claim 4
Dependent Claim
47 words
The cell of Claim 1, further comprising a second supply voltage capacitively coupled to the charge storage node, wherein the second supply voltage is raised to a programming voltage level to allow charge to be removed from the charge storage node, and remains at ground potential otherwise.
Claim 5
Dependent Claim
31 words
The cell of Claim 3, wherein the supply voltage is raised to a programming voltage level to store charge onto the charge storage node, and remains at a ground potential otherwise.
Claim 6
Dependent Claim
33 words
The cell of Claim 1, wherein said programming transistor is physically larger than said select transistor, and wherein programming voltages higher than a normal operating voltage are applied only to said programming transistor.
Claim 7
Dependent Claim
85 words
The cell of Claim 1, wherein, during normal operation, said programming transistor is switched on at all times, the supply voltage is connected to ground, and said select transistor is switched on by a high voltage applied to its control input, whereby, when said select transistor is switched on, the output signal line is connected to ground if said floating gate transistor is controlled to be on by the floating gate, and the output signal line is not connected to ground through the cell otherwise.
Claim 8
Dependent Claim
125 words
An array junction switch element for a programmable logic device comprising: an output signal line; first and second floating gate transistors, each storing one bit of connection information as charge stored on floating gates thereof; first and second select transistors connected between said first and second floating gate transistors, respectively, and said output signal line; and first and second programming transistors connected between said first and second floating gate transistors, respectively, and a supply voltage; wherein said first and second floating gate transistors are programmed by transferring charge between the gates thereof and the supply voltage through said first and second programming transistors, respectively, and wherein said first and second floating gate transistors are read by turning on said first and second select transistors, respectively.
Claim 9
Dependent Claim
125 words
An array junction switch element for a programmable logic device comprising: an output signal line; first and second floating gate transistors, each storing one bit of connection information as charge stored on floating gates thereof; first and second select transistors connected between said first and second floating gate transistors, respectively, and said output signal line; and first and second programming transistors connected between said first and second floating gate transistors, respectively, and a supply voltage; wherein said first and second floating gate transistors are programmed by transferring charge between the gates thereof and the supply voltage through said first and second programming transistors, respectively, and wherein said first and second floating gate transistors are read by turning on said first and second select transistors, respectively.
Claim 10
Dependent Claim
37 words
The switch element of Claim 7, wherein said first and second programming transistors are physically larger than said select transistors, and wherein programming voltages higher than a normal operating voltage are applied only to said programming transistors.
Claim 11
Dependent Claim
87 words
The switch element of Claim 7, wherein, during normal operation, said programming transistors are switched on at all times, the supply voltage is connected to ground, and said select transistors are switched on by a high voltage applied to their control inputs, whereby, when said select transistors are switched on, the output signal line is connected to ground if the connected floating gate transistor is controlled to be on by its floating gate, and the output signal line is not connected to ground through the cell otherwise.
Claim 12
Dependent Claim
133 words
A programmable logic device, having an AND-OR array containing input signal rows and product term signal lines, wherein each junction of a row with a product term signal line contains a switching element comprising: a select transistor connected to the product term signal line and having a control input; a floating gate transistor connected to said select transistor, wherein operation of said floating gate transistor is controlled by charge stored on a charge storage node; and a programming transistor connected to said floating gate transistor and to a supply voltage, and having a control input; wherein the switching element is programmed by transferring charge between the charge storage node and the supply voltage through said programming transistor, and wherein the switching element is read by applying a control signal to said select transistor.
Claim 13
Dependent Claim
133 words
A programmable logic device, having an AND-OR array containing input signal rows and product term signal lines, wherein each junction of a row with a product term signal line contains a switching element comprising: a select transistor connected to the product term signal line and having a control input; a floating gate transistor connected to said select transistor, wherein operation of said floating gate transistor is controlled by charge stored on a charge storage node; and a programming transistor connected to said floating gate transistor and to a supply voltage, and having a control input; wherein the switching element is programmed by transferring charge between the charge storage node and the supply voltage through said programming transistor, and wherein the switching element is read by applying a control signal to said select transistor.
Claim 14
Dependent Claim
33 words
The device of Claim 10, wherein said programming transistor is physically larger than said select transistor, and wherein programming voltages higher than a normal operating voltage are applied only to said programming transistor.
Claim 15
Dependent Claim
86 words
The device of Claim 10, wherein, during normal operation, said programming transistor is switched on at all times, the supply voltage is connected to ground, and said select transistor is switched on by a high voltage applied to its control input, whereby, when said select transistor is switched on, the product term signal line is connected to ground if said floating gate transistor is controlled to be on by the floating gate, and the output signal line is not connected to ground through the cell otherwise.
References Cited (Backward Citations)
No citation records indexed.
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