EP0452091A2
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EP
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Electrically programmable antifuse element and method of forming it
Assignee: Microsemi SoC Corp
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Filing: 1991-04-09
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Granted: —
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Expires: 2011-04-09
Abstract
Abstract An electrically programmable antifuse element incorporates a composite interlayer of dielectric material and amorphous silicon interposed between two electrodes. The lower electrode may be formed from a refractory metal such as tungsten. Preferably, a thin layer of titanium is deposited over the tungsten layer and its surface is then oxidized to form a thin layer of titanium oxide which serves as the dielectric material of the composite dielectric/amorphous silicon interlayer. A layer of amorphous silicon is then deposited on top of the titanium oxide dielectric to complete the formation of the composite interlayer. A topmost layer of a refractory metal such as tungsten is then applied over the amorphous silicon to form the topmost electrode of the antifuse. <IMAGE>
Inventors
- 👤 John L. Mccollum
- 👤 Shih-Ou Chen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 20:13
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10W20/41; H10W20/425
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
46 words
An electrically programmable antifuse element disposed on a semiconductor substrate in an integrated circuit comprising: a first electrode, a dielectric layer disposed over said first electrode, an amorphous silicon layer disposed over said dielectric layer, and a second electrode disposed over said layer of amorphous silicon.
Claim 2
Dependent Claim
27 words
An electrically programmable antifuse element according to claim 1, further including a layer of arsenic doped polysilicon in between said dielectric layer and said amorphous silicon layer.
Claim 3
Dependent Claim
27 words
An electrically programmable antifuse element according to claim 2, wherein said layer of arsenic-doped polysilicon has a thickness in the range of from between 500 to 2500Å.
Claim 4
Dependent Claim
38 words
An electrically programmable antifuse element according to claim 1, 2 or 3, wherein said electrode is electrically connected to a diffusion region within said substrate, said diffusion region having a conductivity type opposite to that of said substrate.
Claim 5
Dependent Claim
39 words
An electrically programmable antifuse element according to any one of claims 1 to 4, wherein said first electrode includes a composite layer comprising a first layer of a refractory metal and a layer of titanium over said first layer.
Claim 6
Dependent Claim
24 words
An electrically programmable antifuse element according to claim 5, wherein said layer of titanium has a thickness in a range from 100Å to 1000Å.
Claim 7
Dependent Claim
24 words
An electrically programmable antifuse element according to any preceding claim, wherein said amorphous silicon layer has a thickness of from about 1000Å to 2500Å.
Claim 8
Dependent Claim
26 words
An electrically programmable antifuse element according to any preceding claim, wherein said second electrode comprises a refractor metal having a thickness of from 1000Å to 2µ.
Claim 9
Dependent Claim
20 words
An electrically programmable antifuse element according to any preceding claim, wherein said dielectric layer comprises a layer of titanium oxide.
Claim 10
Dependent Claim
28 words
An electrically programmable antifuse element according to claim 7, wherein said dielectric layer of titanium oxide has a thickness in the range of from about 50Å to 150Å.
Claim 11
Dependent Claim
24 words
An electrically programmable antifuse element according to any one of claims 1 to 8, wherein said dielectric layer comprises a layer of silicon nitride.
Claim 12
Dependent Claim
27 words
An electrically programmable antifuse element according to claim 11, wherein said layer of silicon nitride has a thickness in a range of from about 80Å to 150Å.
Claim 13
Dependent Claim
38 words
An electrically programmable antifuse element according to any one of claims 1 to 8, wherein said dielectric layer includes a first layer of silicon nitride, and a second layer of silicon dioxide over said layer of silicon nitride.
Claim 14
Dependent Claim
39 words
An electrically programmable antifuse element according to claim 13, wherein said first layer of silicon nitride and said second layer of silicon dioxide have thicknesses in the range of from about 25Å to 50Å and 40Å to 80Å, respectively.
Claim 15
Dependent Claim
38 words
An electrically programmable antifuse element according to any one of claims 1 to 8, wherein said dielectric layer includes a first layer of silicon dioxide, and a second layer of silicon nitride over said layer of silicon dioxide.
Claim 16
Dependent Claim
39 words
An electrically programmable antifuse element according to claim 15, wherein said first layer of silicon dioxide and said second layer of silicon nitride have thicknesses in the range of from about 25Å to 50Å and 40Å to 80Å, respectively.
Claim 17
Dependent Claim
30 words
A semiconductor device disposed on a semiconductor substrate including a plurality of electrically programmable low impedance antifuse elements, each of said antifuse elements being in accordance with any preceding claim.
Claim 18
Independent Claim
97 words
A method of forming an electrically programmable, low impedance antifuse element on a semiconductor substrate comprising the steps of: forming a first electrode over a selected portion of said substrate, forming an insulating layer over said first electrode, forming an opening in said insulative layer to create an exposed portio of said first electrode in a region where said antifuse element is to be located, forming a dielectric layer over said exposed portion of said first electrode layer, forming an amorphous silicon layer over said dielectric layer, and forming an upper electrode over said amorphous silicon layer.
Claim 19
Dependent Claim
58 words
A method according to claim 18, wherein said step of forming a first electrode includes the steps of: selectively implanting a diffusion region in said substrate having a conductivity type opposite to that of said substrate, forming a first refractory metal layer over said diffusion region, and forming a second titanium layer over said first refractory metal layer.
Claim 20
Dependent Claim
24 words
A method according to claim 19, wherein said step of forming a dielectric layer comprises oxidising the exposed surface of said thin titanium layer.
Claim 21
Dependent Claim
33 words
A method according to claim 18, 19 or 20, wherein an arsenic doped polysilicon layer is formed over said dielectric layer and said amorphous silicon layer is formed over said arsenic-doped polysilicon layer.
References Cited (Backward Citations)
No citation records indexed.
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