EP0570101A2
Expired / Lapsed
EP
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Signal processing circuits with digital programmability
Assignee: Agilent Technologies Inc
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Filing: 1993-03-31
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Granted: —
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Expires: 2013-03-31
Abstract
Abstract A mixed analog and digital integrated circuit for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs, comprises analog signal processing channels having functions controlled by a digital control (364) with command input bits (1902) and data input bits (1904), and control registers (1912,1914,1916,1918) which are selected to store corresponding data bits and which have control outputs which effect the digital control of the analog signal processing channels. The integrated circuit has five signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has two digital serial input lines and two digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to six compatible devices can be serially connected in a chain.
Inventors
- 👤 Richard A. Baumgartner
- 👤 Earl C. Herleikson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 16:23
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2472; H03K5/249; A; A61; A61B; A61B5/00; A61B5/24; A61B5/25; A61B5/276; A61B5/30; A61B5/305; A61B5/307; A61B5/308; A61B5/72; A61B5/7203; G; G16; G16H; G16H40/00; G16H40/60; G16H40/63; H03K5/2481; A61B5/279; A61B5/28; A61B5/7235; A61B5/7242; G16H40/40
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
192 words
An integrated circuit comprising: a plurality of analog signal processing channels, each said signal processing channel having a plurality of digitally controllable functions; and digital control means (364) for controlling said plurality of digitally controllable functions, said digital control means further comprising; a digital input signal (366), said digital input signal further comprising command input bits (1902) and data input bits (1904); and command decoder means (1906) for decoding said command input bits (1902) into a plurality of register selection signals; and a plurality of control register means (1912, 1914, 1916, 1918) for storing said data input bits (1904), each said control register means having a plurality of control outputs, each said control output having a plurality of control bits; wherein each said control register means is selected by one said register selection signal within said plurality of register selection signals; and wherein a particular control register means stores said data input bits if selected by the corresponding register selection signal; and wherein each said digitally controllable function is controlled by one particular control output within said plurality of control outputs of one particular control register within said plurality of control registers.
Claim 2
Dependent Claim
73 words
An integrated circuit as in claim 1 wherein each said signal processing channel further comprises: analog amplifier means (126) for amplifying an analog input signal and generating an amplified signal; and wherein each said analog amplifier means has a digitally controllable gain (422); and wherein each said digitally controllable gain is controlled by one control output within said plurality of control outputs of one control register (1912) within said plurality of control registers.
Claim 3
Dependent Claim
101 words
An integrated circuit as in claim 2 further comprising: averaging amplifier means (122, 124) for generating an external averaging output (305) which is an amplified sum of a plurality of analog averaging inputs, wherein there is a one-to-one correspondence between said analog averaging inputs and said amplified signals; and a plurality of summation input switches (1302), each summation switch switchably connecting one said analog summation input to one corresponding amplified signal; and wherein each summation switch is controlled by one particular control output within said plurality of control outputs of one particular control register (1912) within said plurality of control registers.
Claim 4
Dependent Claim
91 words
An integrated circuit as in claim 1 wherein each said analog signal processing channel further comprises: an amplified signal; and analog to digital converter means (346) for converting said amplified signal to a digital output signal (724); wherein said analog to digital converter means further comprises; clock divider means (728, 734) for adjusting a sample rate of said analog to digital converter means; wherein said clock divider means is controlled by one control output within said plurality of control outputs of one control register (1912) within said plurality of control registers.
Claim 5
Dependent Claim
80 words
An integrated circuit as in claim 1 wherein each said signal processing channel further comprises: input lead switching means (323, 1412, 1418, 1422) for switching an input lead (1404) to one of the following: a signal voltage (1402); a calibration voltage (320); a ground voltage (324); or a current source (321); wherein each said lead switching means is controlled by one control output within said plurality of control outputs of one control register (1912) within said plurality of control registers.
Claim 6
Dependent Claim
106 words
An integrated circuit as in claim 1 wherein one said analog signal processing channel is an impedance measuring channel further comprising: impedance measurement means (120) for generating an alternating current output through an external impedance and for rectifying a resulting voltage thereby generating an impedance signal (356); and impedance switching means (362) for determining whether said impedance measuring means or said amplified signal is connected to an analog to digital converter (346) in said impedance measuring channel; and wherein said impedance switching means is controlled by one control output within said plurality of control outputs of one control register (1912) within said plurality of control registers.
References Cited (Backward Citations)
No citation records indexed.
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