Multimedia display control system for storing image data in frame buffer

Claim 2

A system according to claim 1, characterized in that the image data is motion picture data.

Claim 3

A system according to claim 2, characterized in that the motion picture data is MPEG (Motion Picture Experts Group) video data.

Claim 4

A system according to claim 2, characterized in that the motion picture data is DVI (Digital Video Interactive) video data.

Claim 5

A system according to claim 1, characterized in that the image data is still picture data.

Claim 6

A system according to claim 5, characterized in that the still picture data is JPEG video data.

Claim 7

A system according to claim 1, further comprising a graphic subsystem (VGA core) for controlling read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said frame buffer memory means, wherein said graphic subsystem, said palette means, said selecting means, said gray scale control means, and said D/A converter means are constituted by highly integrated semiconductor elements as one chip.

Claim 8

A system according to claim 7, characterized in that said graphic subsystem has a VGA (Video Graphics Arrays) standard.

Claim 9

A system according to claim 1, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 10

A display control system in a portable computer having a flat panel display unit and a connector for connecting an option board, comprising: an MPEG (Motion Picture Experts Group) option board having a decompressor (31) and a YUV/RGB converter (35) mounted thereon, said decompressor decompressing compressed Y, U, and V image data, and said YUV/RGB converter converting the Y, U, and V signals, decompressed by said decompressor, into R, G, and B signals; frame buffer memory means (25) used to temporarily store decompressed image data input from said YUV/RGB converter through said connector, and also used to convert a display timing of a CRT display unit into a display timing of said flat panel display unit; video memory means (23) for storing text data and graphics data; palette means (39) for performing color conversion of display data output from said video memory means; selecting means (41) for selectively outputting image data output from said frame buffer memory means and display data output from said palette means; gray scale control means (43, 45) for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; and D/A converter means (47) for converting display data output from said selecting means into R, G, and B analog signals.

Claim 11

A system according to claim 10, further comprising a graphic subsystem (VGA core) for controlling read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said frame buffer memory means, wherein said graphic subsystem, said palette means, said selecting means, said gray scale control means, and said D/A converter means are constituted by highly integrated semiconductor elements as one chip.

Claim 12

A system according to claim 11, characterized in that said graphic subsystem has a VGA (Video Graphics Arrays) standard.

Claim 13

A system according to claim 10, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 14

A display control system in a portable computer having a flat panel display unit and a connector for connecting an option board, comprising: a DVI (Digital Video Interactive) option board having a decompressor (141) and a memory (21) mounted thereon, said decompressor decompressing compressed Y, U, and V image data, and said memory storing compressed image data to be decompressed by said decompressor; frame buffer memory means (25) used to temporarily store decompressed YUV image data input from said YUV/RGB converter through said connector, and also used to convert a display timing of a CRT display unit into a display timing of said flat panel display unit; YUV/RGB converting means (35) for converting YUV image data output from said frame buffer memory means into RGB image data; video memory means (23) for storing text data and graphics data; palette means (39) for performing color conversion of display data output from said video memory means; selecting means (41) for selectively outputting image data output from said frame buffer memory means and display data output from said palette means; gray scale control means (43, 45) for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; and D/A converter means (47) for converting display data output from said selecting means into R, G, and B analog signals.

Claim 15

A system according to claim 14, further comprising a graphic subsystem (VGA core) for controlling read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said frame buffer memory means, wherein said graphic subsystem, said YUV/RGB converting means, said palette means, said selecting means, said gray scale control means, and said D/A converter means are constituted by highly integrated semiconductor elements as one chip.

Claim 16

A system according to claim 14, characterized in that said graphic subsystem has a VGA (Video Graphics Arrays) standard.

Claim 17

A system according to claim 14, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 18

A system according to claim 14, characterized in that said memory means for storing the compressed image data is constituted by a dynamic random access memory.

Claim 19

A display control system in a portable computer having a flat panel display unit, comprising: Decompressing means (31) for decompressing compressed Y, U, and V image data; memory means (21) for storing compressed image data to be decompressed by said decompressing means; frame buffer memory means (25) used to temporarily store YUV image data decompressed by said decompressing means, and also used to convert a display timing of a CRT display unit into a display timing of said flat panel display unit; YUV/RGB converting means for converting YUV image data output from said frame buffer memory means into RGB image data; video memory means for storing text data and graphics data; palette means for performing color conversion of display data output from said video memory means; selecting means for selectively outputting image data output from said frame buffer memory means and display data output from said palette means; gray scale control means for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; and D/A converter means for converting display data output from said selecting means into R, G, and B analog signals.

Claim 20

A system according to claim 19, further comprising a graphic subsystem for controlling read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said frame buffer memory means, wherein said graphic subsystem, said decompressing means, said memory means, said YUV/RGB converting means, said palette means, said selecting means, said gray scale control means, and said D/A converter means are constituted by highly integrated semiconductor elements as one chip.

Claim 21

A system according to claim 20, characterized in that said graphic subsystem has a VGA (Video Graphics Arrays) standard.

Claim 22

A system according to claim 19, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 23

A display control system in a portable computer having a flat panel display unit, a connector for connecting an option board, and a system bus, comprising: an MPEG (Motion Picture Experts Group) option board having a decompressor, a YUV/RGB converter, and a first frame buffer mounted thereon, said decompressor being connected to said system bus and being connected to said portable computer through said connector and adapted to decompress compressed Y, U, and V image data, said YUV/RGB converter converting Y, U, and V signals decompressed by said decompressor into R, G, and B signals, and said first frame buffer temporarily storing RGB image data output from said YUV/RGB converter; second frame buffer means used to temporarily store image data output from said first frame buffer through said system bus, and also used to convert a display timing of a CRT display unit into a display timing of said flat panel display unit; video memory means for storing text data and graphics data; palette means for performing color conversion of display data output from said video memory means; selecting means for selectively outputting image data output from said second frame buffer means and display data output from said palette means; gray scale control means for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; D/A converter means for converting display data output from said selecting means into R, G, and B analog signals; and a graphic subsystem for controlling read/write operations of image data with respect to said first frame buffer, read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said second frame buffer memory means.

Claim 24

A system according to claim 23, characterized in that said graphic subsystem has a VGA standard.

Claim 25

A system according to claim 23, characterized in that said palette means, said selecting means, said gray scale control means, said D/A converter means, and said graphic subsystem are constituted by highly integrated semiconductor elements as one chip.

Claim 26

A system according to claim 23, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 27

A display control system in a portable computer having a flat panel display unit, a connector for connecting an option board, and a system bus, comprising: a DVI (Digital Video Interactive) option board having a decompressor and a first frame buffer mounted thereon, said decompressor being connected to said system bus and being connected to said portable computer through said connector and adapted to decompress compressed Y, U, and V image data, and said first frame buffer temporarily storing RGB image data output from said decompressor; second frame buffer means used to temporarily store image data output from said first frame buffer through said system bus, and also used to convert a display timing of a CRT display unit into a display timing of said flat panel display unit; YUV/RGB converting means for converting YUV image data output from said second frame buffer means into RGB image data; video memory means for storing text data and graphics data; palette means for performing color conversion of display data output from said video memory means; selecting means for selectively outputting image data output from said YUV/RGB converting means and display data output from said palette means; gray scale control means for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; D/A converter means for converting display data output from said selecting means into R, G, and B analog signals; and a graphic subsystem for controlling read/write operations of image data with respect to said first frame buffer, read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said second frame buffer memory means.

Claim 28

A system according to claim 27, characterized in that said graphic subsystem has a VGA standard.

Claim 29

A system according to claim 27, characterized in that said YUV/RGB converting means, said palette means, said selecting means, said gray scale control means, said D/A converter means, and said graphic subsystem are constituted by highly integrated semiconductor elements as one chip.

Claim 30

A system according to claim 27, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 31

A one-chip display controller constituted by highly integrated semiconductor elements, comprising: a read/write port for allowing a CPU (central processing unit) to access a video memory for storing display data; a read port used to read out display data stored in said video memory into a plate; a read port used to convert display data stored in said video memory and based on a display timing of a CRT display unit into data based on a display timing of a flat panel display unit, and also used to read the data into a frame buffer for storing image data; a write port used to write display data, read out from said video memory, in said frame buffer; a write port used to write image data in said frame buffer; a read port used to read out image data from said frame buffer; a graphic subsystem for controlling read/write operations of display data with respect to said video memory, and read/write operations of image data with respect to said frame buffer; said palette for performing color conversion of display data output from said video memory; a switching circuit (41) for switching/outputting image data output from said frame buffer and display data output from said palette; a gray scale controller (43, 45) for controlling a gray scale of display data output from said switching circuit and outputting the display data to said flat panel display unit; and a D/A converter (47) for converting display data output from said switching circuit into R, G, and B analog signals.

Claim 32

A one-chip display controller constituted by highly integrated semiconductor elements, comprising: a read/write port ((1) in Fig. 2) for allowing a CPU (central processing unit) to access a video memory for storing display data; a read port ((2) in Fig. 2) used to read out display data stored in said video memory into a palette; a read port ((2) in Fig. 2) used to convert display data stored in said video memory and based on a display timing of a CRT display unit into data based on a display timing of a flat panel display unit, and also used to read the data into a frame buffer for storing YUV image data; a write port ((3) in Fig. 2) used to write display data, read out from said video memory, in said frame buffer; a write port ((3) in Fig. 2) used to write image data in said frame buffer; a read port ((4) in Fig. 2) used to read out image data from said frame buffer; a graphic subsystem (VGA core) for controlling read/write operations of display data with respect to said video memory, and read/write operations of image data with respect to said frame buffer; said palette for performing color conversion of display data output from said video memory; a YUV/RGB converter (35) for converting YUV image data output from said frame buffer into RGB image data; a switching circuit (41) for switching/outputting image data output from said YUV/RGB converter and display data output from said palette; a gray scale controller (43, 45) for controlling a gray scale of display data output from said switching circuit and outputting the display data to said flat panel display unit; and a D/A converter (47) for converting display data output from said switching circuit into R, G, and B analog signals.

Claim 33

A multimedia display control system, comprising: frame buffer means (25) for storing decompressed image data; means (53), arranged at an input stage of said frame buffer means, for receiving the decompressed image data in real time and temporarily holding the data; means (51) for holding control information for displaying the image data; and means (65) for controlling said means for temporarily holding the decompressed image data on the basis of control information from said means for holding the display control information for the image data, and writing the image data in said frame buffer means in real time.

Claim 34

A system according to claim 33, characterized in that said means for temporarily storing the image data is constituted by an FIFO register.

Claim 35

A system according to claim 33, characterized in that the image data includes MPEG motion picture data and DVI motion picture data.

Claim 36

A system according to claim 33, further comprising: means for temporarily storing data read out from said frame buffer means; means for holding control information for the image data to be read out; and means for reading out image data from said frame buffer means on the basis of control information from said control information holding means, holding the image data in said temporarily holding means, and performing enlargement/reduction processing of the readout image data.

Claim 37

A system according to claim 36, characterized in that said means for temporarily holding the readout image data is constituted by an FIFO register.

Claim 38

A system according to claim 36, further comprising: means for mixing image data from said temporarily storing means with display data from a high-resolution graphic subsystem.

Claim 39

A system according to claim 38, characterized in that the display data from said high-resolution graphic subsystem includes VGA (Video Graphics Arrays) display data.

Claim 40

A system according to claim 33, characterized in that the control information for the image data includes information for controlling a display area of motion picture data.

Claim 41

A system according to claim 38, characterized in that said means for receiving and temporarily holding the decompressed image data, said means for holding the control information for displaying the image data, said means for writing the image data in said frame buffer means in real time, said means for temporarily holding the image data read out from said frame buffer means, said means for holding the control information for the image data to be read out, said means for performing enlargement/reduction processing of the read image data, and said means for mixing the image data with the display data from said high-resolution graphic subsystem are integrated into one chip.

Claim 42

A display controller for reading out still picture data/motion picture data stored in a frame buffer, enlarging/reducing the image data to an arbitrary size, and displaying the image data at an arbitrary position on a screen to be displayed, comprising: means (51) for holding a value indicating a size of data stored in said frame buffer, horizontal and vertical scale values indicating reduction rates, and a value indicating a window area to be displayed; means (Fig. 19) for performing reduction processing by omitting specific dots of the still picture data/motion picture data; and means (Fig. 19) for checking whether the reduction rate is set such that data to be displayed is smaller in amount than data to be omitted, and changing an omission ratio to obtain data to be displayed.

Claim 43

A motion picture data display control system, comprising: means (121) for converting decompressed motion picture data, externally supplied and constituted by n-bit R, G, and B data, into motion picture data constituted by m-bit R, G, and B data (n > m); means (133) for mixing motion picture data with display data from a high-resolution graphic subsystem; means (125) for converting n-bit display data, supplied from said high-resolution graphic subsystem, or an n-bit output, supplied from said mixing means, into m-bit R, G, and B color data; means (123) for converting an output, supplied from said means for performing conversion to the m-bit R, G, and B motion picture data, into n-bit color discrimination data, and converting an output, supplied from said means for performing conversion to the m-bit R, G, and B color data, into n-bit color discrimination data; means (127) for holding the n-bit color discrimination data obtained by converting the m-bit R, G, and B color data; and means (129, 131) for comparing the n-bit color discrimination data obtained by converting the m-bit R, G, and B color data with the color discrimination data held by said holding means, and writing color discrimination data having a value nearest to that of the color discrimination data obtained by conversion in a frame buffer.

Claim 44

A display control system in a portable computer having a flat panel display unit and a connector for connecting an option board, comprising: decompressing means (31) for decompressing compressed YUV image data; memory means (21) for storing compressed image data to be decompressed by said decompressing means; YUV/RGB converting means (35) for converting YUV image data decompressed by said decompressing means into RGB image data; frame buffer memory means (25) used to temporarily store decompressed RGB image data converted by said YUV/RGB converting means, and also used to convert a display timing of a CRT display unit into a display timing of said flat panel display unit; video memory means for storing text data and graphics data; palette means (39) for performing color conversion of display data output from said video memory means; selecting means (41) for selectively outputting image data output from said frame buffer memory means and display data output from said palette means; gray scale control means (43, 45) for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; and D/A converter means (47) for converting display data output from said selecting means into R, G, and B analog signals.

Claim 45

A system according to claim 44, further comprising a graphic subsystem for controlling read/write operations of display data with respect to said video memory means, and read/write operations of display data and image data with respect to said frame buffer memory means, wherein said graphic subsystem, said decompressing means, said memory means, said YUV/RGB converting means, said palette means, said selecting means, said gray scale control means, and said D/A converter means are constituted by highly integrated semiconductor elements as one chip.

Claim 46

A system according to claim 45, characterized in that said graphic subsystem has a VGA (Video Graphics Arrays) standard.

Claim 47

A system according to claim 45, further comprising means for displaying image data and graphic data together, the image data consisting of 2n bits (n is a positive integer not less than 8), and the graphic data consisting of a smaller number of bits than the image data.

Claim 48

A display control system in a portable computer having a flat panel display unit, comprising: means for receiving image data externally supplied to said portable computer; frame buffer memory means (25) used to convert a display timing of a CRT display unit into a display timing of said flat panel display, and also used to store the image data; video memory means (23) for storing text data and graphics data; palette means (39) for performing color conversion of display data output from said video memory means; selecting means (41) for selectively outputting image data output from said frame buffer memory means and display data output from said palette means; gray scale control means (43, 45) for controlling a gray scale of display data output from said selecting means and outputting the display data to said flat panel display unit; and D/A converter means (47) for converting display data output from said selecting means into R, G, and B analog signals.