EP0607672A2
Expired / Lapsed
EP
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Asynchronous transfer mode (ATM) payload synchronizer
Assignee: AT&T Inc
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Filing: 1993-12-08
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Granted: —
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Expires: 2013-12-08
Abstract
Abstract The requirement of a separate payload clock in an ATM system is eliminated by increasing the number of bytes in an ATM cell and controllably generating and inserting idle cells so that a clock rate equal to that of the incoming SDH, SONET or the like clock rate may be used as a read clock. In one embodiment, the number of cells in a predetermined interval, for example 125 µ sec., is adjusted to be a predetermined integer number by inserting idle cells. This, in turn, allows the use of a "standard" available clock to delineate cell boundaries.
Inventors
- 👤 Gary Don Martin
- 👤 Hiromi Ueda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 01:57
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/062; H04J3/0632; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L49/00; H04L49/10; H04L49/104; H04L49/105; H04L49/108; H04L7/00; H04L7/04; H04L7/041; H04L2007/045; H04L2012/5672; H04L2012/5674; H04L7/048
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
126 words
An asynchronous transfer mode (ATM) payload synchronizer to be supplied with a synchronous digital signal, for example, a SDH, SONET or the like digital signal, having a predetermined clock rate and transporting ATM cells, comprising: means for storing incoming ATM cells to be supplied as an output, each of said ATM cells having a predetermined number of bytes; means for increasing the number of bytes in said incoming ATM cells to be supplied as an output to form internal ATM cells; and means for generating and inserting additional internal ATM cells to be supplied as an output so that a clock rate equal to that of said incoming synchronous digital signal clock rate may be used as a read clock for outputting said internal ATM cells.
Claim 2
Dependent Claim
42 words
The invention as defined in claim 1 wherein said means for generating and inserting generates and inserts a number of additional internal ATM cells so that an integer number of internal ATM cells is supplied as an output during a predetermined interval.
Claim 3
Dependent Claim
21 words
The invention as defined in claim 2 wherein said predetermined interval is 125 µ seconds and said integer number is 45.
Claim 4
Dependent Claim
26 words
The invention as defined in claim 2 wherein said means for increasing increases the number of byte by one (1) to form said internal ATM cell.
Claim 5
Dependent Claim
60 words
The invention as defined in claim 4 wherein said one increased byte comprises a first nibble including four (4) bits and a second nibble including four (4) bits and said means for increasing includes means for inserting said first nibble at the beginning of each incoming ATM cell and said second nibble at the end of each incoming ATM cell.
Claim 6
Dependent Claim
36 words
The invention as defined in claim 5 wherein said first nibble includes at least two (2) type bits indicating whether said ATM cell in an internally generated cell, an incoming cell, an idle cell or not.
Claim 7
Dependent Claim
19 words
The invention as defined in claim 1 wherein said incoming clock rate is the STM-1 rate of 155.52 Mb/s.
References Cited (Backward Citations)
No citation records indexed.
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