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EP0650167A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Content-addressable memory with programmable field masking

Assignee: AT&T Inc
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Filing: 1994-10-12
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Granted: —
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Expires: 2014-10-12
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Abstract

Abstract An apparatus and method for programmable field masking in content-addressable memory (CAM). The present invention provides a CAM with at least one group of memory cells (58,59) interconnected by a word line (77) and a match line (80). The group of memory cells includes data memory cells divided into a number of data memory cell fields for storing data bits of a data word. A mask memory cell (63) is provided within the group of memory cells for storing at least one mask bit indicating a status of data stored in at least one of the data memory cell fields. The mask memory cell is operative to interrupt the match line in response to the stored mask bit. A match line detector (65) detects a signal level on the match line to indicate if input data bits supplied on the data memory cell bit lines match data bits stored in at least one of the data fields. The data memory cell fields may be organized into a hierarchy, with mask memory cells connected between the data fields, to provide hierarchical masking. General programmable masking of any data field within the group is provided using multiplexed mask memory cells connected by bypass lines. The multiplexed mask memory cells may store one or more mask bits in order to allow a bypass line to be connected to portions of the match line, thereby masking a given data memory cell field.

Inventors

  • 👤 Horng-Dar Lin

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-02 02:24
CPC Classifications
G; G11; G11C; G11C15/00; G11C15/04

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 174 words
A content-addressable memory comprising: a group of memory cells interconnected by a word line and a match line, each of said memory cells having a bit line for supplying an input bit to said cell, said group including a plurality of data memory cells for storing data bits of a data word, said plurality of data memory cells divided into a plurality of data memory cell fields; a mask memory cell within said group of memory cells and connected between two of said data memory cell fields for storing at least one mask bit indicating a status of at least one of said data memory cell fields, said mask memory cell operative to interrupt said match line in response to said mask bit; and a first match line detector for detecting a signal level on said match line to determine if input data bits supplied on said bit lines of said data memory cells match said data bits stored in said data memory cells of at least one of said data memory cell fields.
Claim 2
Dependent Claim 34 words
The content-addressable memory of claim 1 further including a second match line detector at an end of said match line opposite an end of said match line connected to said first match line detector.
Claim 3
Dependent Claim 25 words
The content-addressable memory of claim 1 wherein said plurality of data memory cells are divided into a first and a second data memory cell field.
Claim 4
Dependent Claim 68 words
The content-addressable memory of claim 3 wherein said mask memory cell is connected between said first and second data memory cell fields and said mask bit stored in said mask memory cell causes said mask memory cell to interrupt said match line interconnecting said first and second fields if said bits of said data word stored within said first data memory cell field have a don't care status.
Claim 5
Dependent Claim 55 words
The content-addressable memory of claim 1 wherein said plurality of data memory cells are divided into a first, a second and a third data memory cell field, with a first mask memory cell connected between said first and said second fields, and a second mask memory cell connected between said second and said third fields.
Claim 6
Dependent Claim 62 words
The content-addressable memory of claim 5 wherein mask bits stored in said first and second mask memory cells cause at least one of said mask memory cells to interrupt said match line interconnecting two of said data fields if said bits of said data word stored within at least one of said first and said second fields have a don't care status.
Claim 7
Dependent Claim 30 words
The content-addressable memory of claim 1 wherein said mask memory cell includes a switch for interrupting said match line in response to said mask bit stored within said memory cell.
Claim 8
Dependent Claim 129 words
The content-addressable memory of claim 1 wherein said group of interconnected memory cells includes: a first data memory cell field at a word line driver end of said interconnected group; a second data memory cell field at a match line detector end of said group; a first multiplexed mask memory cell connected between said first field and said second field; a second multiplexed mask memory cell connected between said second field and said match line detector; and a bypass line connected to said match line interconnecting said multiplexed mask memory cells in said group such that said match line may bypass a data field connected between said multiplexed mask memory cells in response to at least one mask bit stored in at least one of said multiplexed memory cells.
Claim 9
Dependent Claim 104 words
The content-addressable memory of claim 8 wherein said group of memory cells further includes: at least one additional data memory cell field connected between said first multiplexed mask memory cell and said second data memory cell filed; and an additional multiplexed mask memory cell between said additional data fields and a data field adjacent thereto, said bypass line connected to said match line passing through said multiplexed mask memory cells in said group such that said match line may bypass a data field connected between said multiplexed mask memory cells in response to at least one mask bit stored in said multiplexed memory cells.
Claim 10
Dependent Claim 56 words
The content-addressable memory of claim 9 wherein said additional data memory cell field is a third data field connected between said first multiplexed mask memory cell and said second data field, and said additional multiplexed mask memory cell is a third multiplexed mask memory cell connected between said third data field and said second data field.
Claim 11
Dependent Claim 36 words
The content-addressable memory of claim 8 wherein said first multiplexed mask memory cell includes a left mask memory cell for storing a left mask bit and a right mask memory for storing a right mask bit.
Claim 12
Dependent Claim 25 words
The content-addressable memory of claim 8 wherein said second multiplexed mask memory cell includes a single mask memory cell for storing a single mask bit.
Claim 13
Dependent Claim 37 words
The content-addressable memory of claim 9 wherein said additional multiplexed mask memory cell includes a left mask memory cell for storing a left mask bit and a right mask memory cell for storing a right mask bit.
Claim 14
Dependent Claim 42 words
The content-addressable memory of claim 8 wherein said bypass line is connected between a right portion of said match line within said first multiplexed mask memory cell and a left portion of said match line within said second multiplexed mask memory cell.
Claim 15
Dependent Claim 41 words
The content-addressable memory of claim 11 wherein each of said right and said left mask memory cells in said first multiplexed mask memory cell include a switch for interrupting said match line in response to said right and left mask bits.
Claim 16
Dependent Claim 41 words
The content-addressable memory of claim 13 wherein each of said right and said left mask memory cells in said additional multiplexed mask memory cell includes a switch for interrupting said match line in response to said right and left mask bits.
Claim 17
Dependent Claim 45 words
The content-addressable memory of claim 15 wherein said switch is a MOS transistor with a drain and a source connected in series with said match line, and a gate connected to a memory storage element storing one of said right and said left mask bits.
Claim 18
Independent Claim 186 words
A method of field masking a content-addressable memory comprising the steps of: providing a group of memory cells interconnected by a word line' and a match line, each of said memory cells having a bit line for supplying an input bit to said cell; providing a plurality of data memory cells within said group of memory cells for storing data bits of a data word, said plurality of data memory cells divided into a plurality of data memory cell fields; providing a mask memory cell within said group of memory cells and connected between two of said data memory cell fields; storing in said mask memory cell at least one mask bit indicating a status of at least one of said data memory cell fields, said mask memory cell operative to interrupt said match line in response to said mask bit; and detecting a signal level on said match line to determine if input data bits supplied on said bit lines of said data memory cells match said data bits stored in said data memory cells of at least one of said data memory cell fields.
Claim 19
Dependent Claim 27 words
The method of claim 18 further including the step of providing. a plurality of said groups of memory cells for storing a plurality of said data words.
Claim 20
Dependent Claim 52 words
The method of claim 18 wherein said mask bit stored in said mask memory cell causes said mask memory cell to interrupt said match line interconnecting two of said data fields if said bits of said data word stored within one of said data memory cell fields have a don't care status.
Claim 21
Dependent Claim 129 words
The method of claim 18 further including the steps of: providing a first data memory cell field at a word line driver end of said group; providing a second data memory cell field at a match line detector end of said group; providing a first multiplexed mask memory cell connected between said first field and said second field; providing a second multiplexed mask memory cell connected between said second field and said match line detector; and providing a bypass line connected to said match line interconnecting said multiplexed mask memory cells in said group such that said match line may bypass a data field located between said multiplexed mask memory cells in response to at least one mask bit stored in at least one of said multiplexed memory cells.
Claim 22
Dependent Claim 104 words
The method of claim 21 further including the steps of: providing at least one additional data memory cell field connected between said first multiplexed mask memory cell and said second data memory cell field; and providing an additional multiplexed mask memory cell connected between each of said additional data fields and a data field adjacent thereto, said bypass line connected to said match line interconnecting said multiplexed mask memory cells in said group such that said match line may bypass a data field connected between said multiplexed mask memory cells in response to at least one mask bit stored in said multiplexed memory cells.

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