Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
279 words
A method for detecting and correcting the data transmission errors that may occur during multitone transmission, comprising the steps of: transmitting over a plurality of frequency channels a plurality of words comprised of (i) information words that comprise a plurality of information and horizontal parity checking bits, and (ii) vertical parity words that comprise a plurality of vertical parity checking bits; receiving from the transmitter a multitone transmission block comprised of said plurality of words; mapping said information bits, horizontal parity checking bits and vertical parity checking bits, respectively, as a plurality of information symbols, horizontal parity symbols and vertical parity symbols at their respective frequency channels of transmission; performing cyclic redundancy checking (CRC) over time on the plurality of information words, using the respective plurality of horizontal parity symbols, to detect the presence of a transmission error in any of the plurality of channel symbols; performing CRC over frequency on the plurality of information words, using the plurality of vertical parity bits transmitted at the plurality of frequency channels, to detect at which of the plurality of frequency channels there is a transmission error, where the performance of CRC over time on the plurality of information words detected the presence of a transmission error in any of the plurality of information words; and, requesting that the transmitter retransmit partial vertical parity bits for any frequency channel in the transmission block that is detected as having a transmission error, where the number of frequency channels detected as having a transmission error in the transmission block exceeds the number of frequency channels in the transmission block, which have a transmission error, that can be corrected by forward error correction (FEC).
Claim 2
Dependent Claim
83 words
The method of claim 1, further comprising the step of: performing CRC over frequency on the information words using the retransmitted partial vertical parity bits to detect the frequency channels that have a transmission error for each of a plurality of error subblocks, wherein an error subblock is comprised of a subset of the plurality of information words of the transmission block and is defined from the performance of CRC over frequency on the transmission block using the retransmitted partial vertical parity bits.
Claim 3
Dependent Claim
24 words
The method of claim 2, wherein the partial vertical parity bits are requested to define a first error subblock and a second error subblock.
Claim 4
Dependent Claim
28 words
The method of claim 3, wherein the first error subblock and the second error subblock are comprised, respectively, of mutually exclusive subsets of the plurality of information words.
Claim 5
Dependent Claim
79 words
The method of claim 2, further comprising the step of: performing FEC on an error subblock, where the number of frequency channels detected as having a transmission error, by the performance of CRC over frequency on that error subblock using the respective retransmitted partial vertical parity bits, does not exceed the number of frequency channels in that error subblock that have a transmission error which can be corrected by FEC using the horizontal parity symbols of that error subblock.
Claim 6
Dependent Claim
197 words
The method of claim 5, further comprising the steps of: requesting that the transmitter retransmit partial vertical parity bits for any frequency channel of any error subblock which was defined as a result of the previous retransmission of partial vertical parity bits and which could not be corrected by FEC; performing CRC over frequency using the most recently retransmitted partial vertical parity bits on any error subblock for which partial vertical parity bits were most recently retransmitted to detect the frequency channels that have a transmission error in a plurality of error subblocks which are defined from the performance of CRC over frequency on the error subblocks for which partial vertical parity bits were most recently retransmitted; and, performing FEC on an error subblock defined from the most recent performance of CRC over frequency, where the number of frequency channels detected as having a transmission error, by the performance of CRC over frequency on that error subblock using the respective retransmitted partial vertical parity bits, does not exceed the number of frequency channels in that error subblock that have a transmission error which can be corrected by FEC using the horizontal parity symbols of that error subblock.
Claim 7
Dependent Claim
39 words
The method of claim 6, further comprising the step of: repeatedly performing the steps of requesting partial parity bits, performing CRC over frequency and performing FEC on the mostly recently formed error subblock for a predetermined number of iterations.
Claim 8
Dependent Claim
15 words
The method of claim 7, wherein the predetermined number of iterations is equal to three.
Claim 9
Dependent Claim
38 words
The method of claim 7, further comprising the step of: requesting that the transmitter retransmit by automatic repeat request the information bits of an error subblock that cannot be corrected by FEC, when the iteration limit is reached.
Claim 10
Independent Claim
150 words
A method for adaptively changing which frequency channels, of a plurality of frequency channels that may be used by a transmitter for the transmission data bits in a multitone transmission system, are to be used for the transmission of data bits during the course of the processing of multitone transmission blocks by a receiver, comprising the steps of: detecting the transmission errors that occur at each of the, plurality of frequency channels by performing cyclic redundancy checking over time and frequency on a multitone transmission block; storing in a memory data representative of the frequency channels detected in error as a plurality of running sums; processing the values of the running sums to determine which, if any, of the plurality of frequency channels are to be used for data transmission; and, transmitting an acknowledgement from the receiver to the transmitter indicating the frequency channels to be used for data transmission.
Claim 11
Independent Claim
165 words
An apparatus for adaptively changing which frequency channels, of a plurality of frequency channels that may be used for the transmission data bits in a multitone transmission system, are to be used by a transmitter for the transmission of data bits during the course of the processing of multitone transmission blocks received by a receiver, comprising: a processor in said receiver to perform cyclic redundancy checking over time and frequency on a multitone transmission block in order to detect the transmission errors that occur at each of the plurality of frequency channels; a memory in said receiver to store data representative of the detected frequency channels in error as a plurality of running sums; said processor determining based on the values of the running sums which, if any, of the plurality of frequency channels are to be used for data transmission; and, a transmission means in said receiver for transmitting to said transmitter an acknowledgement indicating the frequency channels to be used for data transmission.
Claim 12
Independent Claim
303 words
A system for detecting and correcting the data transmission errors that may occur during multitone transmission, comprising: a transmitter for transmitting over a plurality of frequency channels a plurality of words comprised of (i) information words that comprise a plurality of information and horizontal parity checking bits, and (ii) vertical parity words that comprise a plurality of vertical parity checking bits; a receiver for receiving from the transmitter a multitone transmission block comprised of said plurality of words; and, said receiver further comprising a processor, wherein said processor maps said information bits, horizontal parity checking bits and vertical parity checking bits, respectively, as a plurality of information symbols, horizontal parity symbols and vertical parity symbols at their respective frequency channels of transmission, wherein said processor performs cyclic redundancy checking (CRC) over time on the plurality of information words, using the respective plurality of horizontal parity symbols, to detect the presence of a transmission error in any of the plurality of channel symbols, wherein said processor performs CRC over frequency on the plurality of information words, using the plurality of vertical parity bits transmitted at the plurality of frequency channels, to detect at which of the plurality of frequency channels there is a transmission error, where the performance of CRC over time on the plurality of information words detected the presence of a transmission error in any of the plurality of channel symbols, and wherein said processor requests that the transmitter retransmit partial vertical parity bits for any frequency channel in the transmission block that is detected as having a transmission error, where the number of frequency channels that is detected as having a transmission error in the transmission block exceeds the number of frequency channels in the transmission block, which have a transmission error, that can be corrected by forward error correction (FEC).
Claim 13
Dependent Claim
82 words
The system of claim 12, wherein said processor performs CRC over frequency on the information words using the retransmitted partial vertical parity bits to detect the frequency channels that have a transmission error in each of a plurality of error subblocks, wherein each said error subblock is comprised of a subset of the plurality of information words of the transmission block and is defined from the performance of CRC over frequency on the transmission block using the retransmitted partial vertical parity bits.
Claim 14
Dependent Claim
24 words
The system of claim 13, wherein the partial vertical parity bits are requested to define a first error subblock and a second error subblock.
Claim 15
Dependent Claim
28 words
The system of claim 14, wherein the first error subblock and the second error subblock are comprised, respectively, of mutually exclusive subsets of the plurality of information words.
Claim 16
Dependent Claim
77 words
The system of claim 12, wherein the processor performs FEC on an error subblock where the number of frequency channels detected as having a transmission error, by the performance of CRC over frequency on that error subblock using the respective retransmitted partial vertical parity bits, does not exceed the number of frequency channels in that error subblock that have a transmission error which can be corrected by FEC using the horizontal parity symbols of that error subblock.
Claim 17
Dependent Claim
204 words
The system of claim 16, wherein the processor requests that the transmitter retransmit partial vertical parity bits for any frequency channel of any error subblock which was defined as a result of the previous retransmission of partial vertical parity bits and which could not be corrected by FEC; wherein the processor performs CRC over frequency using the most recently retransmitted partial vertical parity bits on any error subblock for which partial vertical parity bits were most recently retransmitted to detect the frequency channels that have a transmission error in a plurality of error subblocks which are defined from the performance of CRC over frequency on the error subblocks for which partial vertical parity bits were most recently retransmitted; and, wherein the processor performs FEC on an error subblock defined from the most recent performance of CRC over frequency, where the number of frequency channels detected as having a transmission error by the performance of CRC over frequency on that error subblock using the respective retransmitted partial vertical parity bits does not exceed the number of frequency channels in the words of that error subblock that have a transmission error which can be corrected by FEC using the horizontal parity symbols of that error subblock.
Claim 18
Dependent Claim
37 words
The system of claim 17, wherein the processor repeatedly performs the steps of requesting partial parity bits, performing CRC over frequency and performing FEC on the mostly recently formed error subblock for a predetermined number of iterations.
Claim 19
Dependent Claim
15 words
The system of claim 18, wherein the predetermined number of iterations is equal to three.
Claim 20
Dependent Claim
36 words
The system of claim 18, wherein the processor requests that the transmitter retransmit by automatic repeat request the information bits of an error subblock that cannot be corrected by FEC, when the iteration limit is reached.