EP0725487A2
Expired / Lapsed
EP
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Multilevel coding for fractional bits
Assignee: AT&T Inc
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Filing: 1996-01-24
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Granted: —
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Expires: 2016-01-24
Abstract
Abstract Method and apparatus are disclosed for efficient encoding of symbols with multilevel encoding, where components of the symbols that are more susceptible to errors are encoded more robustly than components that are less susceptible to error. A non-binary constellation of symbols is handled with a fractional bit rate converter that combines with the multilevel encoder (31-33) to create an effective and efficient constellation of symbols. Illustratively, digital data is encoded and mapped onto a set of symbols, with the two least significant bits of the symbols being encoded with a multi-level code. The least significant bit is encoded with a code that is more robust than the code of the next-to-least significant bit, in recognition of the fact that errors in the least significant bit are much more likely. The most significant bits are mapped with the aid of a fractional bit rate mapper (33) that optimizes a selected aspect of the symbol constellation, such as average power.
Inventors
- 👤 Hanan Herzberg
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 23:02
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M13/00; H03M13/03; H03M13/23; H04; H04L; H04L25/00; H04L25/02; H04L25/03; H04L25/03006; H04L25/03343; H04L25/38; H04L25/40; H04L25/49; H04L25/4917; H04L25/4927; H04L1/00; H04L2001/0098
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
150 words
An encoder responsive to an applied digital signal for developing digitized symbols, comprising: a mapper which, in response to every B bits of said applied signal develops L sets of high significance bits, where each set of the high significance bits contains C bits; and encoding means responsive to bits of said applied signal for developing sets of low significance bits, where each set of the low significance bits contains A bits, where A, B, L, and C are integers and B/L is a mixed fraction, where the low significance bit sets comport with a preselected error correcting schema, and where a concatenation of a most significant bit set of C bits with a low significance bit set of A bits forms one of said symbols, with the C bits forming the more significant bits of the symbol and the A bits forming the less significant bits of the symbol.
Claim 2
Dependent Claim
14 words
The encoder of claim 1 wherein said error correcting code is a block code.
Claim 3
Dependent Claim
14 words
The encoder of claim 1 wherein said error correcting code is a convolutional code.
Claim 4
Dependent Claim
51 words
The encoder of claim 1 where the coding means comprises: first coding stage responsive to bits of said applied signal for developing the least significant bits of said symbols; and second coding stage responsive to bits of said applied signal for developing the next to least significant bits of said symbols.
Claim 5
Dependent Claim
85 words
The encoder of claim 1 where the coding means comprises: first coding stage responsive to bits of said applied signal for developing the least significant bits of said symbols, where said least significant bits of said symbols comport with a first preselected error correcting code; and second coding stage responsive to bits of said applied signal for developing the next to least significant bit of said symbols, where said next to least significant bits of said symbols comport with a second preselected error correcting code.
Claim 6
Dependent Claim
21 words
The encoder of claim 5 where said first preselected error correcting code is different from said second preselected error correcting code.
Claim 7
Dependent Claim
25 words
The encoder of claim 5 where said first preselected error correcting code is more capable at correcting errors than said second preselected error correcting code.
Claim 8
Dependent Claim
107 words
The encoder of claim 1 where the coding means comprises: first coding stage responsive to bits of said applied signal for developing groups of bits comprising the least significant bits of said symbols, where said least significant bits of said symbols comport with a first preselected error correcting code; and second coding stage responsive to bits of said applied signal for developing middle groups of bits comprising the bits of said symbols that are between said least significant bits of said symbols and said most significant bits of said symbols, where said middle groups of bits of said symbols comport with a second preselected error correcting code.
Claim 9
Dependent Claim
119 words
The encoder of claim 1 where the coding means comprises: first coding stage responsive to bits of said applied signal for developing groups D of bits, where said groups D comport with a first preselected error correcting code; and second coding stage responsive to bits of said applied signal for developing groups E of bits, where said middle groups of bits of said symbols comport with a second preselected error correcting code; where each of said symbols is a concatenation of the C bits of a set of high significance bits from the mapper and the bits from groups E, and D, in order, where the C bits from the mapper comprise the most significant bits of each symbol.
Claim 10
Dependent Claim
154 words
The encoder of claim 1 where the coding means comprises: first coding means responsive to bits of said applied signal for developing groups D of bits, where said groups D comport with a first preselected error correcting code; and second coding means responsive to bits of said applied signal for developing groups E of bits, where said middle groups of bits of said symbols comport with a second preselected error correcting code; means for developing groups F from preselected uncoded and unmapped bits of said applied signal; and means for forming symbols from said groups D, E, and F, and the C bits from the mapper, where each of said symbols is a concatenation of the C bits of a set of high significance bits from the mapper and the bits from groups F, E, and D, in order, where the C bits of the mapper comprise the most significant bits of each symbol.
Claim 11
Dependent Claim
21 words
The encoder of claim 1 where bits employed by the mapper and bits employed by the encoding means are mutually exclusive.
Claim 12
Dependent Claim
12 words
The encoder of claim 1 where said coding means performs multi-level coding.
Claim 13
Dependent Claim
45 words
The encoder of claim 1 where said coding means performs multi-level coding to create sets A of bits, each set A comprises two subsets, and one of the subsets comports with a first preselected error correction code, and the other of the subsets is unencoded.
Claim 14
Dependent Claim
51 words
The encoder of claim 1 where said coding means performs multi-level coding to create sets A df bits, each set A comprises two subsets, and one of the subsets comports with a first preselected error correction code, and the other of the subsets comports with a second preselected error correction code.
Claim 15
Dependent Claim
27 words
The encoder of claim 14 where said first preselected error correction code is a block code, and said second preselected error correction code is a parity code.
Claim 16
Dependent Claim
27 words
The encoder of claim 14 where said first preselected error correction code is a convolution code, and said second preselected error correction code is a parity code.
Claim 17
Dependent Claim
27 words
The encoder of claim 14 where said first preselected error correction code is a convolution code, and said second preselected error correction code is a block code.
Claim 18
Dependent Claim
57 words
The encoder of claim 11 where said coding means performs multi-level coding to create sets A of bits, each set A comprises three subsets, and one of the subsets comports with a first preselected error correction code, another of the subsets comports with a second preselected error correction code, and a third of the subsets is uncoded.
Claim 19
Dependent Claim
24 words
The encoder of claim 1 where the mapper contains an alphabet of symbols that minimize the average power of signals developed from said symbols.
Claim 20
Dependent Claim
164 words
An encoder responsive to an applied digital signal for developing digitized symbols, comprising: a mapper which, in response to every B bits of said applied signal develops L sets of high significance bits, where each set of the high significance bits contains C bits; and encoding means responsive to bits of said applied signal for developing sets of low significance bits, where each set of the low significance bits contains A bits, where A, B, L, and C are integers and B/L is a mixed fraction, where the mapper contains an alphabet of symbols that minimize the average power of signals developed from said symbols, where the low significance bit sets are unencoded, and where a concatenation of a most significant bit set of C bits with a low significance bit set of A bits forms one of said symbols, with the C bits forming the more significant bits of the symbol and the A bits forming the less significant bits of the symbol.
Claim 21
Dependent Claim
36 words
The encoder of claim 1 where the mapper contains an alphabet of symbols that maximizes the number of symbols that correspond to signals having a large power requirement, within a given constraint of maximum average power.
Claim 22
Dependent Claim
25 words
The encoder of claim 1 where the mapper contains an alphabet of symbols that minimizes the number of symbols that require redundancy for error protection.
References Cited (Backward Citations)
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