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EP0840276A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Window processing in an on screen display system

Assignee: Texas Instruments Inc
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Filing: 1997-11-03
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Granted: —
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Expires: 2017-11-03
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Abstract

Abstract A system is described that allows simultaneous display on a display screen of bit-map, graphic, still video picture, motion video picture or background. A frame memory containing the page to be displayed is located in an the SDRAM. A display controller reads the frame memory block by block and transfers the data to a Fifo. For each pixel, the OSD decoder reads the bits required to display the current pixel from the FIFO. The number of bits per pixel varies during the display depending upon the mode. The pixel selector and its controller select the bits of data from the FIFO to form the current pixel.

Inventors

  • 👤 Gerard Chauvel
  • 👤 Gerard Benbassat
  • 👤 Brian Chae

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-24 10:36
CPC Classifications
H; H04; H04N; H04N21/00; H04N21/40; H04N21/41; H04N21/426; H04N21/42653; H04N5/00; H04N5/44; H04N5/445; G; G09; G09G; G09G5/00; G09G5/14; G09G5/36; G09G5/39; G09G5/395; H04N19/00; H04N19/42; H04N19/60; H04N19/61; H04N21/42607; H04N21/42615; H04N21/42623; H04N21/43; H04N21/431; H04N21/434; H04N21/439; H04N21/44; H04N21/443; G09G2340/00; G09G2340/04; G09G2340/12; G09G2340/125; G09G2360/00; G09G2360/02

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 48 words
An on-screen display co-processor, comprising: a FIFO; a decoder coupled to said FIFO; a display controller coupled to said FIFO and decoder; a window controller coupled to said display controller; line and pixel counters coupled to said windows controller; and an attribute memory coupled to said display controller.
Claim 2
Dependent Claim 63 words
A window controller, comprising: a content addressable memory for storing data corresponding to window position and size and for comparing pixel and line counter data with such data, at least one flip-flop coupled to said memory for indicating whether a window is active or not active, and a priority encoder coupled to said flip-flop for selecting the display order of any active windows.

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