EP0864979A2
Expired / Lapsed
EP
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Processor performance counter for sampling the execution frequency of individual instructions
Assignee: Digital Equipment Corp
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Filing: 1998-03-03
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Granted: —
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Expires: 2018-03-03
Abstract
Abstract A processor includes an execution pipeline and a retire unit coupled to an end of the execution pipeline. The processor executes instructions of a program. An apparatus for collecting performance data while the instructions are executing includes a register coupled to the retire unit of the processor. Means are provided for incrementing the register whenever an instruction is retired from the execution pipeline. In addition, the apparatus includes means for generating an interrupt to an interrupt handler whenever the register is incremented to a predetermined value.
Inventors
- 👤 Lance M. Berc
- 👤 William Weihl
- 👤 Shun-Tak Albert Leung
- 👤 Mark T. Vandevoorde
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-24 15:02
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/30; G06F11/34; G06F11/3409; G06F11/3447; G06F2201/00; G06F2201/81; G06F2201/815; G06F2201/86; G06F2201/88
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
69 words
An apparatus for collecting performance data of a
processor including an execution pipeline and a retire unit
coupled to an end of the execution pipeline, comprising: a register coupled to the retire unit of the
processor; means for incrementing the register whenever an
instruction is retired from the execution pipeline;
and means for generating an interrupt to an interrupt
handler whenever the register is incremented to a
predetermined value.
Claim 2
Dependent Claim
33 words
The apparatus of claim 1 further comprising:
an internal processor register for storing a
program counter value associated with the instruction
whose retirement causes the counter to increment,
overflow, and generate an interrupt.
Claim 3
Dependent Claim
26 words
The apparatus of claim 2 further comprising:
means for identifying the program counter value
to record in the internal processor register while the
instruction is executing.
References Cited (Backward Citations)
No citation records indexed.
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