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JPH023916A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of semiconductor device

Assignee: Sony Corp
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Filing: 1988-06-22
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Granted: —
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Expires: 2008-06-22
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Abstract

Abstract PURPOSE:To form a shallow impurity region, and enable sufficient activation of impurity by a method wherein heat treatment at a high temperature is simultaneously performed in the state that base impurity is uniformly diffused in a polycrystalline silicon layer, and emitter impurity of high concentration is implanted as far as an intermediate part of the Iayer. CONSTITUTION:An insulating layer 2 and a polycrystalline silicon layer 3 are formed on a substrate 1; base impurity 4, e.g., boron, is uniformly diffused in the depth direction of the layer 3; emitter impurity 6, e.g., arsenic, is implanted as far as the midway from the layer 3 surface, and the concentration is made higher than the boron; annealing is executed en bloc in a nitrogen atmosphere: then the diffusion of boron is restrained because of field effect generated at the time of diffusion of the high concentration aresenic, so that a shallow P-type base region 5 is formed in the substrate 1 side. In addition, a shallow N-type emitter region 7 is formed in the region 5, so that the base width can be narrowed. Further, diffusion layers can be simultaneously annealed at a high temperature, so that the sufficient activation of the emitter impurity is enabled.

Inventors

  • 👤 Takayuki Gomi
  • 👤 五味 孝行
  • 👤 Hiromi Sasaki
  • 👤 博美 佐々木

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 20:27
CPC Classifications
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