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JPS5493376A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit device

Assignee: Fujitsu Ltd
•
Filing: 1977-12-30
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Granted: —
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Expires: 1997-12-30
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Abstract

Abstract PURPOSE:To prevent the deterioration in the switching performance, by providing the fundamental pattern replaceable for wiring between the electrode pad of the surrounding of chip and the macros at the center. CONSTITUTION:The basic pattern 4 is placed at the space between the electrode pad 2 and the macros 3. Each pattern 4 consists of the small sized transistors TR1 to TR5, large sized TR6, TR7 and resistors R1 to R6. With this constitution, when the element electrode of mark is suitably connected, the gate circuit is constituted, and the gate circuit is formed by using TR1 to TR5 and resistors R1 to R6, TR7 is used for the emitter follower 7 of other gate circuit, or the logic output constituted with the macros 3 is received by only using TR6 and TR7 and it can be delivered to the input and output electrode pad 4. Thus, without making longer the output wiring of the current switch of macros, the deterioration of the switching performance can be prevented. And, since it can be formed on the substrate, the chip size can not be increased.

Inventors

  • 👤 Kenichi Ono
  • 👤 Toru Hosomizu
  • 👤 Rokutaro Ogawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 05:37
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/901

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS4939388A Cited
JPS49103582A Cited
JPS49122675A Cited
JPS52106279A Cited
JPS6060309A Cited

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