Static memory cell
Abstract
Abstract PURPOSE:To enable low power consumption of static memory, by connecting the power saving circuit being the impedant enabling to flow a small current to the degree that the memory state of the memory cell can be kept at non-selection. CONSTITUTION:The power save circuit PD consists of MOSFETQ7, and it is connected between the power supply Vcc and the point A. Thus, at the chip non- selection when the chip selection signal CS is at L level, the impedance of Q7 is increased and the potential at the point A is lower than the power supply Vcc by the voltage drop of the transistor Q7. Accordingly, to the memory cell MEM, the difference voltage between the point A and GND lower than Vcc is fed, and current limit in response to the mutual conductance gm of the transistor Q7 is made, allowing to save the power consumption.
Inventors
- 👤 Keizo Aoyama
- 👤 Eiji Noguchi
- 👤 Takahiko Yamauchi
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.