Memory access circuit

Abstract

Abstract PURPOSE:To perform two dimension access from both the address and bit directions, by providing the shift register, preset counter and clock control circuit controlling them. CONSTITUTION:The address buses Ao-Ak are given to the decoder 2 via the alternative circuit 8, and the address buses Bo-Bl for bit direction access are given to the n-alternative circuit 6 to be input to the shift register 11, and the data is parallel data with the clock from the clock control circuit 12 and fed to the data buses Do-Dn via the alternative circuit 10 in n-bit. Further, the l-bit OR circuit 7 controls the clock control circuit 12 and switches the k-bit preset counter 9. Accordingly, the two dimension memory access can be made with simplicity without using the software program.

Inventors

• 👤 Kiyotsugu Kawabata

Bibliographic Details