Semiconductor storage circuit device

Abstract

Abstract PURPOSE:To realize a high-speed operation of a semiconductor storage circuit device, by reducing the delay of a conduction wire with a contact secured between a polysilicone layer forming a row line, etc. and a low resistance molybdenum metallic layer which is parallel to the polysilicone layer. CONSTITUTION:Memory cell parts 203 and 204, etc. contain memory cells arrayed by a polysilicone layer 204 that form a continuous gate transistor with a low level of threshold voltage and high stability of properties. A row line is driven by these memory cell parts. An ohmic contact is secured between the layer 204 and a low resistance molybdenum metallic layer 208 which is prallel to the layer 204 via aperture parts 205, 206, 207... which are provided to an insulated layer at the space part of the parts 203, 204.... In such constitution, the delay of propagation due to the resistance of a conduction wire such as a row line is reduced. Thus the speed of operation can be increased for a semiconductor storage circuit device.

Inventors

• 👤 Toru Tsujiide
• 👤 Noboru Hirakawa

Bibliographic Details