Semiconductor integrated circuit

Abstract

Abstract PURPOSE:To reduce the consumption of power supply current in an assured way, by providing a means for supplying voltage higher than the gate voltage to the source of a control depression type MOS transistor in a power-down mode. CONSTITUTION:A control depression type MOS transistor TR11, a load TR12 and a driving enhancement EH type MOSTR13 are connected between power supply VC and the earth. At the same time, an EH type MOS controlling TR14 is connected in parallel with the TR13. Both the TR11 and TR14 receive gate control with a power-down signal-PD and a signal PD. The signals PD and -PD are set at 1 and 0 respectively in a power-down mode. Thus the TR14 conducts and voltage VSO is applied to the source of the TR12 from a voltage generating circuit 21, and the voltage VSO is set at a certain level that is decided by the ratio of the conduction resistance of TRs22-24 of the circuit 21. The threshold voltage of the TR12 is set larger than that of the TR11. Thus the VSO is supplied to the source of the TR11 via the TR12, and the gate of the TR11 is equivalently turned negative. Thus the TR11 is assuredly cut off to reduce current consumption.

Inventors

• 👤 Hiroshi Iwahashi
• 👤 岩橋　弘
• 👤 Masamichi Asano
• 👤 正通 浅野

Bibliographic Details