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JPS589271A Expired / Lapsed JP ⏱️ 0.0 years remaining

Multimemory driving method

Assignee: NEC Home Electronics Ltd
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Filing: 1981-07-08
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Granted: —
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Expires: 2001-07-08
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Abstract

Abstract PURPOSE:To obtain a highly economical multimemory driving method by using a buffer for wriring and an erase data register for erasing by all memory in common. CONSTITUTION:Address signals are supplied to the address signal input terminal (a) of memory elements 1a-1d from the starting time of a period T2 which is a half of period T, and the data of an erase data register 4 are supplied to data input terminal (d) of memory elements 1a-1d. The contents of memory of the memory elements are erased by this action. Address signals are continuously supplied to the address signal input terminal (a) from the erasing period T2. Consequently, the data of address corresponding to the address signal is read from the memory element and reading is performed from an output terminal OUT through a P/S cover 2 etc. By this way, one erase register and one bus driver can be used by all memory elements in common and economical efficiency can be enhanced.

Inventors

  • 👤 Tetsuo Inose
  • 👤 猪瀬 哲男

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-25 11:28
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/20

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