delay circuit

Abstract

Abstract PURPOSE:To make the delay time of leading and trailing edges coincident with each other by connecting a P-MISFET and an N-MISFET in parallel to constitute the resistance element of a time constant circuit. CONSTITUTION:When an input signal Vin rises from L to H, the conductance of an N-MISFETQ6 decreases and the conductance of a P-MISFETQ7 increases to charge a capacitor C3 through the P-MISFETQ7, so that when the voltage across the capacitor exceeds the threshold value of an N-MISFETQ9, the output falls to L. When the input signal Vin falls from H to L, on the other hand, the capacitor C3 is discharged through the N-MISFETQ6 and a P-MISFETQ8 turns on, so that the output rises to H. The N-MISFETQ6 and P-MISFETQ7 are equalized in conductance when applied with the same bias voltage to equalize the delay time of leading and trailing edges to each other.

Inventors

• 👤 Atsushi Oritani
• 👤 折谷　敦志

Bibliographic Details