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JPS60119782A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: NEC Corp
•
Filing: 1983-12-01
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Granted: —
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Expires: 2003-12-01
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Abstract

Abstract PURPOSE:To realize stable transistor performance characteristics by preventing punch-throughs by a method wherein a gate is rendered to be thicker at a step along the boundary between an element region and a field oxide film. CONSTITUTION:A polycrystalline Si gate 11 is abruptly larger, in the vicinity of a step 8 positioned along the periphery of an element isolating field oxide film 2 surrounding an element region 3, than its middle-portion length L. The reduction in gate thickness created due to the step 8 can nor be neglected because of the enlargement LL virtually eliminating any effect detrimental to transistor performance characteristics. This method realizes MOS transistors with their characteristics uniform.

Inventors

  • 👤 Shigeru Iwata
  • 👤 岩田 滋

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 03:36
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516

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