Mos transistor device
Abstract
Abstract PURPOSE:To keep the characteristic of high withstand voltage without being influenced by the gate voltage value by a method wherein the titled device is provided with a double-diffused layer of required conductivity which couples two regions forming an offset section. CONSTITUTION:The double-diffused layer 22 is provided between an N<+> type diffused layer 18 and a P<--> type substrate 12 and consists of the first N<-> type diffused layer 23 one end of which has been formed so as to reach the lower part of the thinner part 15a of a gate insulation film and of the second N type diffused layer 24 formed in the layer 23 so as to extend from the lower part of the part 15a to the inside of a layer 18. In the layer 23 its impurity profile is determined so that the impurity concentration C gently varies with the depth D from the surface of the substrate 12 and that the concentration C in the substrate surface (D=0) decomes relatively smaller. The layer 24 has the impurity profile that the concentration C in the substrate surface is relatively larger and that the concentration C rapidly decreases with the increase in depth D.
Inventors
- 👤 Masaharu Ozaki
- 👤 尾崎 正晴
Bibliographic Details
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