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JPS6098780A Expired / Lapsed JP ⏱️ 0.0 years remaining

Still image recording and playback device

Assignee: Hitachi Ltd
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Filing: 1983-11-04
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Granted: —
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Expires: 2003-11-04
📄 Original PDF 🌐 Google Patents

Abstract

Abstract PURPOSE:To make it possible to decrease errors and to reduce a size of a signal processing circuit by non-interlacing an interlaced signal and recording a signal in order of the frame scanning, when a still picture signal is recorded for the time sharing. CONSTITUTION:A picture signal 1 is A/D-converterted 10 and is stored in a one frame memory 11. An error detection correction code is added to a picture signal 2 read from the memory 11 at low speed at a code circuit 12 and is memorized to a memory 13 per several lines and is interleaved. The synchronizing signal and the control signal are added to the interleaved signal at a code circuit 14, and the signal is outputted per two lines, is modulated 15, a sound signal is added 16, the recording is amplified 17 and is inputted to a signal switching circuit 18. The circuit 18 records the input signal to a rotation head drum 50 in order of the line of the frame period. The recorded data are demodulated 31, identified 32 with a code, detected 33 for the error, deinterleaved with the memory 34, decoded 35, inputted to a frame memory 40, D/A-converted 41, interlaced and outputted.

Inventors

  • 👤 Michio Masuda
  • 👤 増田 美智雄
  • 👤 Yasuo Yude
  • 👤 弓手 康夫
  • 👤 Takao Arai
  • 👤 孝雄 荒井
  • 👤 Takaharu Noguchi
  • 👤 敬治 野口
  • 👤 Masaharu Kobayashi
  • 👤 正治 小林

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-07 08:40
CPC Classifications
—

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