← Back to Patent Explorer
JPS61242467A Expired / Lapsed JP ⏱️ 0.0 years remaining

Signal processing circuit for facsimile receiver

Assignee: NEC Corp
•
Filing: 1985-04-20
•
Granted: —
•
Expires: 2005-04-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To eliminate a quantizing distortion generated by a receiving image of low resolution, by deciding it from a pattern of the periphery of a notice picture element, and applying a correction to a part of a high resolution picture element, in case of receiving an image signal of low resolution by a recording device of high resolution. CONSTITUTION:Signal processing circuits 4-1-4-4 input said picture signal which has been delayed by one line and one picture element, respectively, and execute signal processing for each interpolating line and picture element by signal processing control signals 27-30 and a signal processing timing signal 43. Outputs which have been processed by the signal processing circuits 4-1-4-4 are provided to line memories 5-1-5-4, respectively, as picture signals 18-21 of each interpolating line. In the line memories 5-1-5-4, the applied interpolating picture signals 18-21 of the vertical direction are brought to interpolation of the horizontal direction, and 4 lines are written simultaneously. When executing readout, the line memory of 4 lines is outputted successively by one line unit, and delivered to a recording part.

Inventors

  • 👤 Tsutomu Honma
  • 👤 勉 本間

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 19:07
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag