Semiconductor device

Abstract

Abstract PURPOSE:To obtain the MOS memory device of the same plane area having a large charge capacitance by forming an accumulation capacitor of the structure of adding the capacitance of an impurity diffused layer arranged under an epitaxial grown layer. CONSTITUTION:An impurity diffused layer 11 is formed in a P type semiconductor substrate 1 of low-resistant Si or the like by diffusing arsenic in a required part. Next, epitaxial grown layers 12 and 13 of P type Si are grown after removal of a resist pattern having served as a diffusion mask 10. Here, the impurity concentrations of the grown layers 12 and 13 are controlled so that the layer 12 in the neighborhood of the substrate 1 may come into a low resistance, and that the layer 13 in the neighborhood of the surface may come into a concentration of the same degree as the normal conventional concentration of the substrate 11. Thereafter, a field oxide film 2 is formed by positioning to the shape pattern of the impurity diffused layer 11, and an impurity diffused layer 15 contacting the layer 11 and an impurity diffused layer 14 are successively formed, resulting in the production of the title device having MOS memory cell elements.

Inventors

• 👤 Katsumi Dousaka
• 👤 勝己 堂阪

Bibliographic Details