MIS type field effect transistor

Abstract

Abstract PURPOSE:To contrive the improvement in hot electron resistance by the quantity of channel doping consequent on miniaturization by using the insulating film which prevents the impurity diffusion except that of silicon oxide at least in a part of a gate film and using the electrode having a work function difference from that of the substrate which is of a positive value or a negative value close to zero for the gate electrode. CONSTITUTION:On a P-type silicon substrate 101, an N<+> type diffusion region 102 for forming source and drain, a gate film 103 of nitrided silicon oxide which is formed by directly nitriding the 20-50Angstrom thickness of surface region of a silicon oxide film, and P-type polysilicon gate electrode 104 in which boron is diffused by about 1X10<20> concentration are formed. The polysilicon gate 104 doped with boron and the film 103 in which the surface region of 20-50Angstrom thickness of a silicon oxide film is converted into nitrided silicon oxide are combined so as to make a threshold voltage a positive value by a small quantity of channel doping. Accordingly, generation of hot electrons in a miniaturized MIS transistor can be restrained and a transistor having a stable threshold voltage can be fabricated.

Inventors

• 👤 Yasuro Ikeda
• 👤 康郎 池田
• 👤 Mitsuru Sakamoto
• 👤 充 坂本

Bibliographic Details