← Back to Patent Explorer
JPS6352471A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory

Assignee: Hitachi Ltd
•
Filing: 1986-08-22
•
Granted: —
•
Expires: 2006-08-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE:To improve the holding characteristic of information in a semiconductor memory by composing source, drain regions of N-channel MISFET of part of a peripheral circuit of a first semiconductor region and a second semiconductor region having an impurity concentration lower than that of the first region, and composing the MISFET of memory cell of only the first region. CONSTITUTION:The source, drain regions of selective MISFETQS1, QS2 and drive MISFETQD1, QD2 are formed of high concentration regions 7A. Sidewall spacers are formed on the sides of gate electrodes 6G1-6G4, and an n<+> type semiconductor region 7A is not specified thereby. The region 7A is specified by the electrodes 6G1-6G4, disposed around the lower part, and the parasitic capacity (Miller capacity) of the electrodes 6G3, 6G4 of the drive MISFETQD1, QD2, i.e., the memory node of the memory cell is increased. Thus, the holding characteristic of information is improved.

Inventors

  • 👤 Hiroaki Kotani
  • 👤 博昭 小谷

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 16:26
CPC Classifications
H; H10; H10B; H10B10/00

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag