Negative resistance diode circuit

Claim 1

THE COMBINATION OF A FIRST TUNNEL DIODE CIRCUIT, A SECOND TUNNEL DIODE CIRCUIT HAVING A SIGNAL INPUT TERMINAL AND A TUNNEL DIODE SIGNAL ELECTRODE, A SIGNAL COUPLING PATH FROM THE OUTPUT OF SAID FIRST TUNNEL DIODE CIRCUIT TO THE SIGNAL INPUT TERMINAL OF SAID SECOND TUNNEL DIODE CIRCUIT, SAID SIGNAL COUPLING PATH INCLUDING A FIRST TUNNEL RECTIFIER, A TRANSMISSION LINE AND A SECOND TUNNEL RECTIFIER, IN THE ORDER NAMED, AND A REFLECTION PREVENTING INPUT CIRCUIT IN SAID SECOND TUNNEL DIODE CIRCUIT INCLUDING A THIRD TUNNEL RECTIFIER CONNECTED FROM SAID SIGNAL INPUT TERMINAL TO SAID TUNNEL DIODE SIGNAL ELECTRODE, AND A FOURTH TUNNEL RECTIFIER CONNECTED FROM SAID SIGNAL INPUT TERMINAL TO A POINT OF FIXED BIAS POTENTIAL, SAID THIRD AND FOURTH TUNNEL RECTIFIERS BEING POLED AND BIASED SO THAT SAID THIRD TUNNEL RECTIFIER PRESENTS A LOW IMPEDANCE PATH FOR AN INPUT SIGNAL SOLELY UNTIL SAID SECOND TUNNEL DIODE SWITCHES, WHEREUPON SAID THIRD TUNNEL RECTIFIER CHANGES TO A HIGH IMPEDANCE PATH, AND SO THAT SAID FOURTH TUNNEL RECTIFIER PRESENTS A HIGH IMPEDANCE TO SAID INPUT SIGNAL AND A LOW IMPEDANCE TO THE SUM OF SAID INPUT SIGNAL AND A REFLECTED SIGNAL WHICH IS PRESENT AFTER SAID SECOND TUNNEL DIODE HAS SWITCHED.