High speed binary counter

Claim 1

A COUNTING CIRCUIT RESPONSIVE TO A UNIPOLAR PULSE SOURCE COMPRISING A BISTABLE FLIP-FLOP CIRCUIT HAVING INPUT AND OUTPUT CIRCUITS AND EXHIBITING FIRST AND SECOND OUTPUT POTENTIALS IN SAID OUTPUT CIRCUIT IN RESPONSE TO CURRENT PULSES APPLIED TO SAID INPUT CIRCUIT OF A FIRST POLARITY AND A SECOND OPPOSITE POLARITY, RESPECTIVELY, SAID POLARITIES BEING RELATIVE TO A REFERENCE POTENTIAL EXISTING AT SAID INPUT CIRCUIT IN THE ABSENCE OF A PULSE, A PATH DIRECTLY INTERCONNECTING SAID UNIPOLAR SOURCE HAVING SAID FIRST POLARITY AND SAID INPUT CIRCUIT FOR APPLYING EACH PULSE FROM SAID SOURCE TO SAID INPUT CIRCUIT, AND MEANS INCLUDING A GATING CIRCUIT INTERCONNECTING SAID UNIPOLAR SOURCE AND SAID FLIP-FLOP INPUT CIRCUIT RESPONSIVE TO THE CONCURRENCE OF SAID FIRST POTENTIAL IN SAID FLIP-FLOP OUTPUT CIRCUIT AND A PULSE FROM SAID SOURCE FOR APPLYING A PULSE OF SAID SECOND OPPOSITE POLARITY TO SAID INPUT CIRCUIT OF SAID FLIP-FLOP.