Time-sampling-pulse amplifier

Claim 2

A circuit for amplifying pulses from a source, the combination comprising: a. a pulse amplifier for receiving pulses from said source and having at least one resistance-capacitance pulse coupling network therein, said resistance-capacitance network having a relatively short time constant; b. a logic generator for receiving pulses from said source and producing an output control sigNal in response to each said pulse, said control signal having a length extending over the time each pulse is being received at said pulse amplifier; c. for increasing the impedance value of at least one of the components of said resistance-capacitance network upon receipt of said control signal from said logic generator; and d. a preamplifier connected between said pulse amplifier and said source, an integrating resistance-capacitance network being provided in said preamplifier, second means being provided in said preamplifier for increasing the time constant of said integrating resistance-capacitance network upon receipt of said control signal from said logic generator.

Claim 3

A circuit as described in claim 1 wherein the resistance of said resistance-capacitance network is made up of at least two parallel resistance branches, a rapidly acting switch being connected in series with one of said parallel resistance branches, said switch being openable upon receipt of said control signal.

Claim 4

A circuit as described in claim 2 wherein said switch is a transistor having decreased conductivity upon receipt of said control signal at a control terminal thereof.

Claim 5

A circuit as described in claim 1 wherein an operational-type amplifier stage is provided in said preamplifier, said integrating resistance-capacitance network having a capacitance and resistance connected in parallel in a negative feedback circuit from the output to the input of said operational amplifier stage, said second means having a variable gain amplifier stage receiving input signals from said operational amplifier stage and having a gain control means providing increased gain upon receipt of an output signal from said logic generator, said variable gain amplifier stage having an output signal inverted with respect to input signals, at least a portion of output signals from said variable-gain amplifier stage being applied at an intermediate point along said resistance in said integrating resistance-capacitance network in phase opposition to output signals from said operational amplifier, whereby the time constant of said integrating resistance-capacitance network is increased when an output signal from said logic generator is applied to said variable-gain amplifier stage.

Claim 6

A circuit for amplifying pulses from a source, the combination comprising: a. a pulse amplifier for receiving pulses from said source and having at least one resistance-capacitance pulse coupling network therein, said resistance-capacitance network having a relatively short time constant; b. a logic generator for receiving pulses from said source and producing an output control signal in response to each said pulse, said control signal having a length extending over the time each pulse is being received at said pulse amplifier and for a period after termination of each said input pulse, said logic generator further having a sampling output signal, said sampling signal being coincident with said control signal for at least a terminal portion of said period; c. a sample gate circuit provided at the output of said pulse amplifier, said sample gate circuit being characterized by conductivity controllable by said sampling signal, the conductivity of said gate circuit being high upon receipt of said sampling signal whereby output signals from said pulse amplifier are preferentially coupled through said sample gate circuit when said sampling signal is applied thereto; and d. first means for increasing the impedance value of at least one of the components of said resistance-capacitance network upon receipt of said control signal from said logic generator.

Claim 7

A circuit for amplifying pulses from a source, the combination comprising: a. a pulse amplifier for receiving pulses from said source and having at least one resistance-capacitance pulse coupling network therein, said resistance-capacitance network having a relatively short time constant; b. a logic generator for receiving pulses from said source and producing an output control signal in response to each said pulse, said control signal having a length extending over the time each pulse is being received at said pulse amplifier and for a period after termination of each said input pulse, said logic generator further having a sampling output signal, said sampling signal being coincident with said control signal for at least a terminal portion of said period; c. a sample gate circuit provided at the output of said pulse amplifier, said sample gate circuit being characterized by conductivity controllable by said sampling signal, the conductivity of said gate circuit being high upon receipt of said sampling signal whereby output signals from said pulse amplifier are preferentially coupled through said sample gate circuit when said sampling signal is applied thereto; and d. first means for increasing the impedance value of at least one of the components of said resistance-capacitance network upon receipt of said control signal from said logic generator.

Claim 8

A circuit as described in claim 5 wherein said pulse amplifier has a steady-state reference potential connection therein, said sample gate circuit having an impedance through which output signals from said pulse amplifier are passed, said sample gate circuit having a switch connected from an intermediate point along said impedance to said steady-state reference potential connection, said switch being openable upon receipt of said sampling pulse.

Claim 9

A circuit as described in claim 2 further characterized in that a signal delay means is connected between said source and said pulse amplifier.