US3568312A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making printed circuit boards
Assignee: HP Inc
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Filing: 1968-10-04
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Granted: 1971-03-09
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Expires: 1988-10-04
Abstract
Abstract A FOIL CLAD SUBSTRATE HAVING HOLES THERETHROUGH IS SELECTIVELY ETCHED TO PROVIDE DESIRED ELECTRICAL CIRCUIT PATHS ON BOTH SIDES OF THE SUBSTRATE. THE SUBSTRATE IS COATED WITH AN ELECTROLESS METAL, AND A METAL COATING IS SELECTIVELY DEPOSITED ON THE SUBSTRATE AND WITHIN THE HOLES IN THE SUBSTRATE TO PROVIDE ELECTRICAL INTERCONNECTIONS BETWEEN THE CIRCUIT PATHS ON BOTH SIDES OF THE SUBSTRATE. AN ENCAPSULANT COATING IS THEN SELECTIVELY DEPOSITED ON THE SUBSTRATE TO PREVENT THE CIRCUIT PATHS FROM COMING INTO CONTACT WITH THE SURROUNDING ENVIRONMENT.
Inventors
- 👤 Robert A Perricone
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 14:50
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/40; H05K3/42; H05K3/425; H05K3/428; H05K3/02; H05K3/06; H05K3/061; H05K3/062; H05K3/22; H05K3/24; H05K3/243; H05K2203/00; H05K2203/05; H05K2203/0502; H05K2203/0542
Claims Analysis
Total Claims: 0
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References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-03-08 | 1974-09-07 | 1975-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-03-08 | 1978-09-07 | 1979-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-03-08 | 1982-09-07 | 1983-03-09 | $7700.00 | Window Closed / Lapsed |