US3573623A
Expired / Lapsed
US
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Transversal filter
Assignee: Bunker Ramo Corp
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Filing: 1968-10-24
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Granted: 1971-04-06
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Expires: 1988-10-24
Abstract
Abstract A transversal filter which includes means for encoding an analogue value of an applied synchronous input signal into a binary pulse train. The binary pulse train is applied through a delay line which has taps spaced at discrete intervals. The outputs from at least selected ones of the taps are utilized to gate predetermined values stored in associated storage means to the inputs of a summing means. The output from the summing means is utilized as the transversal filter output. The transversal filter described above may be utilized as part of an automatic line equalizer by initially applying known test signals to the filter and utilizing the error signals generated by comparing the outputs from the filter against a desired reference to adjust the predetermined values stored in the storage means. When these values have been set such as to provide an output which differs from the reference within predetermined limits, the equalizer is ready to operate on information inputs.
Inventors
- 👤 John Michael Bannon
- 👤 Joseph Carroll Kvarda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:08
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/03; H04L25/03006; H04L25/03012; H04L25/03114; H04L25/03133
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
113 words
A transversal filter comprising: means for applying to said filter a input signal, an analogue value of which varies with time; means for encoding said analogue value into a binary pulse train; a delay line with taps at discrete intervals; means for applying said binary pulse train to be passed through said delay line; a plurality of storage means, each of said storage means storing a predetermined value; summing means; means for utilizing the outputs from at least selected ones of said delay line taps to gate the values stored in said storage means to said summing means; and means for utilizing the output from said summing means as the transversal filter output.
Claim 2
Dependent Claim
113 words
A transversal filter comprising: means for applying to said filter a input signal, an analogue value of which varies with time; means for encoding said analogue value into a binary pulse train; a delay line with taps at discrete intervals; means for applying said binary pulse train to be passed through said delay line; a plurality of storage means, each of said storage means storing a predetermined value; summing means; means for utilizing the outputs from at least selected ones of said delay line taps to gate the values stored in said storage means to said summing means; and means for utilizing the output from said summing means as the transversal filter output.
Claim 3
Dependent Claim
29 words
A filter of the type described in claim 1 wherein said transverse filter output means includes means for converting the output from said summing means into a smooth waveform.
Claim 4
Dependent Claim
29 words
A filter of the type described in claim 2 wherein said means for converting the output from the summing means into a smooth waveform is a low pass filter.
Claim 5
Dependent Claim
46 words
A filter of the type described in claim 1 wherein: said delay line is a multiposition shift register; and including clock means for stepping said shift register at exactly the same rate as that at which the pulses of said binary pulse train are applied thereto.
Claim 6
Dependent Claim
27 words
A filter of the type described in claim 4 whereiN the rate at which said clock means applies stepping inputs to said shift register may be varied.
Claim 7
Dependent Claim
42 words
A filter of the type described in claim 1, wherein: said analogue value is the input signal amplitude; and said encoding means includes means for converting said amplitude into a pulse train the pulse density of which is proportional to said amplitude.
Claim 8
Dependent Claim
17 words
A filter of the type described in claim 6 wherein said converting means is a delta-sigma modulator.
Claim 9
Dependent Claim
66 words
A filter of the type described in claim 4 wherein: said analogue value is the amplitude of the input signal; said encoding means includes means for converting said amplitude into a pulse train the pulse density of which is proportional to said amplitude; and said clock means controls both the generation of pulses by said converting means and the shifting of pulses through said shift register.
Claim 10
Dependent Claim
20 words
A system of the type described in claim 1 including means for setting said predetermined values into said storage means.
Claim 11
Dependent Claim
132 words
An automatic equalizer comprising: means for applying to said equalizer input signal on which equalization is desired, an analogue value of said input signal varying with time; means for encoding said analogue value into a binary pulse train; a delay line with taps at discrete intervals; means for applying said binary pulse train to be passed through said delay line; a plurality of storage means each of said storage means storing a predetermined value which is to be utilized in weighting said input signal for equalization; summing means; means for utilizing the outputs from at least selected ones of said delay line taps to gate the weighting values stored in said storage means to said summing means; and means for utilizing the output from said summing means as the equalized output signal.
Claim 12
Dependent Claim
132 words
An automatic equalizer comprising: means for applying to said equalizer input signal on which equalization is desired, an analogue value of said input signal varying with time; means for encoding said analogue value into a binary pulse train; a delay line with taps at discrete intervals; means for applying said binary pulse train to be passed through said delay line; a plurality of storage means each of said storage means storing a predetermined value which is to be utilized in weighting said input signal for equalization; summing means; means for utilizing the outputs from at least selected ones of said delay line taps to gate the weighting values stored in said storage means to said summing means; and means for utilizing the output from said summing means as the equalized output signal.
Claim 13
Dependent Claim
40 words
An equalizer of the type described in claim 10 wherein the output from said summing means is a multivalue pulse train; and wherein said summing means utilizing means includes means for converting said multivalue pulse train into a smooth waveform.
Claim 14
Dependent Claim
46 words
An equalizer of the type described in claim 10 wherein: said delay line is a multiposition shift register; and including clock means for stepping said shift register at exactly the same rate as that at which the pulses of said binary pulse train are applied thereto.
Claim 15
Dependent Claim
40 words
An equalizer of the type described in claim 12 wherein the rate at which said clock means applies stepping inputs to said shift register may be varied in accordance with variations in the clock rate of said synchronous input signal.
Claim 16
Dependent Claim
17 words
An equalizer of the type described in claim 10 wherein said encoding means is a delta-sigma modulator.
Claim 17
Dependent Claim
52 words
An equalizer of the type described in claim 10 wherein: all of said delay line taps, except the center tap of said delay line, are utilized to gate weighting values stored in corresponding storage means to said summing means; and the bit at said center tap is assigned a weight of unity.
Claim 18
Dependent Claim
20 words
An equalizer of the type described in claim 10 including means for setting said predetermined values into said storage means.
Claim 19
Dependent Claim
94 words
An equalizer of the type described in claim 16 wherein: said input signal applying means includes means for applying a predetermined test signal to said equalizer; and said predetermined values setting means includes means for comparing the output from said equalizer at selected intervals after said test signal is applied to said equalizer against a desired reference, and means for utilizing the error output from said comparing means at each of said intervals to, depending on the polarity of the error, increment or decrement the value in a selected one of said storage means.
Claim 20
Dependent Claim
82 words
An equalizer of the type described in claim 17 including means for inhibiting further change in the values stored in said storage means. 19. An equalizer of the type described in claim 17 wherein: said storage means are forward-reVerse counters; and said error output utilizing means includes means for storing each of said error polarities, and means operative when said test signal has passed completely through said delay line for applying the stored error values to increment or decrement said forward-reverse counters.
Claim 21
Dependent Claim
19 words
An equalizer of the type described in claim 10 including means for controlling the amplitude of the equalizer output.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-04-05 | 1974-10-05 | 1975-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-04-05 | 1978-10-05 | 1979-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-04-05 | 1982-10-05 | 1983-04-06 | $7700.00 | Window Closed / Lapsed |