US3581285A
Expired / Lapsed
US
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Keyboard to memory peripheral device
Assignee: Honeywell Inc
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Filing: 1968-11-20
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Granted: 1971-05-25
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Expires: 1988-11-20
Abstract
Abstract A data recording device is disclosed for entering data into a memory field via a keyboard and for right justifying the entered data in the memory field. The device includes a keyboard with which data is entered, a buffer memory and register that assemble and right justify the data; and a file memory, such as a magnetic tape recorder into which the data is finally recorded. Flag bits stored in the buffer memory, each one associated with a data character, are used for housekeeping purposes to keep track of the location of selected data and to control the right justification sequencing.
Inventors
- 👤 Farid J Neema
- 👤 Robert C Engelhardt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:12
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/01; G06F3/02; G06F3/0227; G06F5/00; G06F5/01
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
214 words
Apparatus for justifying data in fields of a keyboard to memory device wherein an addressable buffer memory is connected between said keyboard and a file memory and wherein said keyboard includes data keys and control keys, said apparatus comprising: a. transfer means including a register for entering data characters into consecutively addressed locations in a field of said buffer memory; b. bistable means actuated by said data and control keys for setting flag bits in a field of said buffer memory that correspond to data locations and reset a flag bit in a memory location following the last entered character; c. means to decrement the memory address to the most significant position of said field; d. means to force a zero character into said most significant position of said buffer memory field and to transfer the data in said position to said register; e. means to increment the memory address sequentially interchanging the contents of said buffer memory location that is addressed with the contents of said register until the memory location containing the reset flag bit is addressed; and f. means to detect said reset flag bit and cyclically cause a decrement-increment sequence to occur until the most significant position of a subsequent field is detected thereby signifying completion of the justification operation.
Claim 2
Dependent Claim
214 words
Apparatus for justifying data in fields of a keyboard to memory device wherein an addressable buffer memory is connected between said keyboard and a file memory and wherein said keyboard includes data keys and control keys, said apparatus comprising: a. transfer means including a register for entering data characters into consecutively addressed locations in a field of said buffer memory; b. bistable means actuated by said data and control keys for setting flag bits in a field of said buffer memory that correspond to data locations and reset a flag bit in a memory location following the last entered character; c. means to decrement the memory address to the most significant position of said field; d. means to force a zero character into said most significant position of said buffer memory field and to transfer the data in said position to said register; e. means to increment the memory address sequentially interchanging the contents of said buffer memory location that is addressed with the contents of said register until the memory location containing the reset flag bit is addressed; and f. means to detect said reset flag bit and cyclically cause a decrement-increment sequence to occur until the most significant position of a subsequent field is detected thereby signifying completion of the justification operation.
Claim 3
Dependent Claim
36 words
operates said logic means to store a second flag indication in the control group location associated with the next-successively addressed character location after the last character location in a field thereof and storing a keyed character.
Claim 4
Dependent Claim
36 words
operates said logic means to store a second flag indication in the control group location associated with the next-successively addressed character location after the last character location in a field thereof and storing a keyed character.
Claim 5
Dependent Claim
66 words
Apparatus as defined in claim 1 in which said bistable means is responsive to operation of said data keys to be set in one bistable state and is responsive to one of said control key to be selectively set in a second bistable state and further comprising means operative to exchange the state of said bistable device with a flag bit condition in said buffer memory.
Claim 6
Dependent Claim
28 words
responsive to at leAst a second condition of said control digits to cause said memory address register to address successively decrementing memory buffer locations on successive memory operations.
Claim 7
Dependent Claim
28 words
responsive to at leAst a second condition of said control digits to cause said memory address register to address successively decrementing memory buffer locations on successive memory operations.
Claim 8
Dependent Claim
35 words
responsive to at least a first condition of said control digits to cause said memory address register to address successively incrementing memory buffer locations on successive memory buffer operations, and C. left cycle sequence means
Claim 9
Dependent Claim
35 words
responsive to at least a first condition of said control digits to cause said memory address register to address successively incrementing memory buffer locations on successive memory buffer operations, and C. left cycle sequence means
Claim 10
Dependent Claim
22 words
Apparatus as defined in claim 1 wherein the flag bit is also capable of being set and reset during the verification procedure.
Claim 11
Dependent Claim
59 words
Apparatus as defined in claim 3 wherein said register is a shift register having a parallel input from said keyboard, a parallel output to said file memory, a serial input from said buffer memory and a serial output to said buffer memory and wherein said transfer means controls the interchange of data between said register and said buffer memory.
Claim 12
Dependent Claim
15 words
Apparatus as defined in claim 1 wherein said file memory is a magnetic tape recorder.
Claim 13
Dependent Claim
149 words
In a data recording apparatus having a keyboard including data and control keys, a buffer memory capable of sequentially storing entered data character-by-character, and a file memory into which recorded data is transferred; a method of right justifying data in a field of the buffer memory comprising the steps of: a. setting a flag bit associated with each column of said buffer memory as a data character is entered into the respective column; b. resetting the flag bit in the memory column location following the last entered data character; c. incrementing and decrementing sequentially through the buffer memory and entering zero code characters to the left in the memory field by detecting the state of each respective flag bit and by detecting the most significant bit positions of the field of interest and the subsequent field to determine the extent of incrementing and decrementing, thereby completing right justification operation.
Claim 14
Dependent Claim
149 words
In a data recording apparatus having a keyboard including data and control keys, a buffer memory capable of sequentially storing entered data character-by-character, and a file memory into which recorded data is transferred; a method of right justifying data in a field of the buffer memory comprising the steps of: a. setting a flag bit associated with each column of said buffer memory as a data character is entered into the respective column; b. resetting the flag bit in the memory column location following the last entered data character; c. incrementing and decrementing sequentially through the buffer memory and entering zero code characters to the left in the memory field by detecting the state of each respective flag bit and by detecting the most significant bit positions of the field of interest and the subsequent field to determine the extent of incrementing and decrementing, thereby completing right justification operation.
Claim 15
Dependent Claim
152 words
A method of right justifying data as defined in claim 6 wherein said incrementing and decrementing cycle comprising: a. decrementing to the previous set flag bit; b. interchanging the character indicated by said flag bit with a zero character, resetting the flag bit and temporarily storing the interchanged character; c. incrementing until the most significant position of the following field is detected to thereby indicate the last column location of the operative field; d. entering the interchanged character in said last column and setting the flag bit in said last column; e. decrementing to the next previous set flag bit, interchanging with a zero, temporarily storing the interchanged character and resetting that flag bit; f. incrementing to a set flag bit and entering the interchanged character; and g. repeating the decrement-increment sequence until the character in the most significant bit position of the operative field has been interchanged with a zero character.
Claim 16
Dependent Claim
122 words
A method of right justifying data as defined in claim 6 wherein said incrementing and decrementing cycle comprises: a. decrementing to the previous set flag bit, interchanging the character in that column with a zero character, storing the interchanged character and resetting the associated flag bit; b. incrementing by one, entering the stored character and setting the flag bit; c. repeating the previous steps until all characters have been incremented one position and the most significant position in the operative field contains a zero character; and d. incrementing until the most significant position of the following field is detected to thereby indicate the last column location of the operative field, then repeating steps (a), (b), and (c) until right justification is complete.
Claim 17
Dependent Claim
151 words
In a data recording apparatus having a keyboard including data and control keys, a memory capable of sequentially storing data character-by-character, and mass storage means into which recorded data is transferred; a method of right justifying data in a memory field comprising the steps of: a. setting a flag bit associated with each column of said memory as a data character is entered into the respective column; b. resetting the flag bit in the memory column location following the last entered data character; c. decrementing to the most significant position of said memory field; d. exchanging the character in said most significant position for a zero code; e. successively incrementing and moving each data character column-by-column until all data characters have been advanced one column; f. repeating the three previous steps, if necessary, until the most significant position of the next field is encountered, thereby indicating completion of right justification operation.
Claim 18
Dependent Claim
151 words
In a data recording apparatus having a keyboard including data and control keys, a memory capable of sequentially storing data character-by-character, and mass storage means into which recorded data is transferred; a method of right justifying data in a memory field comprising the steps of: a. setting a flag bit associated with each column of said memory as a data character is entered into the respective column; b. resetting the flag bit in the memory column location following the last entered data character; c. decrementing to the most significant position of said memory field; d. exchanging the character in said most significant position for a zero code; e. successively incrementing and moving each data character column-by-column until all data characters have been advanced one column; f. repeating the three previous steps, if necessary, until the most significant position of the next field is encountered, thereby indicating completion of right justification operation.
Claim 19
Dependent Claim
119 words
A keyboard to memory device having i. a keyboard having data keys and control keys, ii. a file memory for storing coded representations of characters selected with said keyboard, iii. a buffer memory for assembling said coded representations for transfer to said file memory, said buffer memory storing a group of one or more control digits in a location associated with the location storing said representation of a character, and iv. a memory address register for addressing locations in said buffer memory, said device also having right justification apparatus comprising A. logic means for controlling and detecting the condition of said group of control digits associated with each character stored in said memory buffer, B. right cycle sequence means
Claim 20
Dependent Claim
119 words
A keyboard to memory device having i. a keyboard having data keys and control keys, ii. a file memory for storing coded representations of characters selected with said keyboard, iii. a buffer memory for assembling said coded representations for transfer to said file memory, said buffer memory storing a group of one or more control digits in a location associated with the location storing said representation of a character, and iv. a memory address register for addressing locations in said buffer memory, said device also having right justification apparatus comprising A. logic means for controlling and detecting the condition of said group of control digits associated with each character stored in said memory buffer, B. right cycle sequence means
Claim 21
Dependent Claim
38 words
A keyboard to memory device as defined in claim 10 in which said memory buffer stores in each said group of control digits an indication whether the associated character is a most significant character and a flag indication.
Claim 22
Dependent Claim
34 words
A keyboard to memory device as defined in claim 11 in which A. said buffer memory stores said character representations in locations arranged in fields of one or more locations, and B. said keyboard
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-24 | 1974-11-23 | 1975-05-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-24 | 1978-11-23 | 1979-05-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-24 | 1982-11-23 | 1983-05-25 | $7700.00 | Window Closed / Lapsed |